Aaeon GENE-BSW5 manuals
GENE-BSW5
Table of contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Chapter 1 - Product Specifications
- Specifications
- Chapter 2 – Hardware Information
- Dimensions
- Dimensions (Optional HDMI SKU)
- Jumpers and Connectors
- Jumpers and Connectors (Optional HDMI SKU)
- Block Diagram
- List of Jumpers
- Front Panel Connector (JP1)
- LVDS Port Operating VDD Selection (JP4)
- Touchscreen 4/5/8-wire Selection (JP14)
- List of Connectors
- VSB Output w/SMBus (CN1)
- LVDS Port Inverter / Backlight Connector (CN3)
- SATA Port 1 (CN5)
- LVDS2 Port Inverter / Backlight Connector (CN7)
- LVDS Port (CN9)
- Audio I/O Port (CN10)
- COM Port 2 (CN11)
- LPT Port / 8 bit DIO (CN12)
- COM Port 3 (CN13)
- LPC Port (CN14)
- COM Port 6 (CN15)
- COM Port 5 (CN16)
- BIOS Debug Port (CN18)
- USB 2.0 Port 2 (CN20)
- USB 2.0 Port 4 (CN21)
- Touchscreen Connector (CN23)
- PS/2 Keyboard/Mouse Combo Port (CN24)
- CPU Fan (CN25)
- LAN (RJ-45) Port2 (CN27)
- COM Port 1 (D-SUB 9) (CN29)
- HDMI Port (CN30)
- Battery (CN31)
- MiniCard Slot (Half-MiniCard) (CN33)
- DDR3L SO-DIMM (CN34)
- Chapter 3 - AMI BIOS Setup
- System Test and Initialization
- AMI BIOS Setup
- Setup submenu: Main
- Setup submenu: Advanced
- Advanced: CPU Configuration
- Advanced: SATA Configuration
- Advanced: USB Configuration
- Advanced: Hardware Monitor
- Hardware Monitor: Smart Fan Configuration
- Advanced: SIO Configuration
- SIO Configuration: Serial Port 1-6 Configuration
- SIO Configuration: Parallel Port Configuration
- Advanced: CSM Configuration
- Advanced: Power Management
- Advanced: Digital IO Port Configuration
- Setup submenu: Chipset
- Chipset: North Bridge Configuration
- North Bridge: LVDS Panel Configuration
- Chipset: South Bridge
- Setup submenu: Security
- Setup submenu: Boot
- Boot: BBS Priorities
- Setup submenu: Save & Exit
- Chapter 4 – Drivers Installation
- Product CD/DVD
- Note on EHCI
- Appendix A - Watchdog Timer Programming
- A.1 Watchdog Timer Registers
- A.2 Watchdog Sample Program
- Appendix B - I/O Information
- B.1 I/O Address Map
- B.2 Memory Address Map
- B.3 IRQ Mapping Chart
- Appendix C – Digital I/O Ports
- C.1 Electrical Specifications for Digital I/O Ports
- C.2 DI/O Programming
- C.3 Digital I/O Register
- C.4 Digital I/O Sample Program
- Appendix D – Notes for Users
- D.1 Notes for Users
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