Xilinx Spartan-6 LX9 manuals
Spartan-6 LX9
Table of contents
- Table Of Contents
- Table Of Contents
- Introduction
- Board Features
- Reference Designs
- Ordering Information
- Functional Description
- Xilinx Spartan-6 FPGA LX9 FPGA
- Figure 4 – XC6SLX9 CSG324 I/O Allocation
- Clocks
- Memory
- Mb x 16 (64MB) Micron LPDDR Mobile SDRAM component
- Table 5 – LPDDR Timing Parameters
- Mb Micron Multi-I/O SPI Flash
- Communication
- Figure 7 – 10/100 Ethernet Interface
- Table 9 – 10/100 Pin Assignments
- User I/O and Expansion Connectors
- User Interfaces
- Power
- FPGA Decoupling
- Power Results
- Configuration
- Test Design
- Acknowledgements
- Getting Help and Support
- Revision History
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