M u l t i - T o u c h P a n e l P C A C P - 5 1 5 3Appendix A Programming the Watchdog Timer A-2A.1 ProgrammingACP-5153 utilizes ITE 8783 chipset as its watchdogtimer controller. Below are the procedures to complete itsconfiguration and the AAEON initial watchdog timerprogram is also attached based on which you candevelop customized program to fit your application.Configuring Sequence DescriptionAfter the hardware reset or power-on reset, the ITE 8783 enters thenormal mode with all logical devices disabled exceptKBC. The initial state (enable bit ) of this logical device (KBC) isdetermined by the state of pin 121 (DTR1#) at the falling edge ofthe system reset during power-on reset.
