Aaeon GCS-1500i User Manual
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Contents
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G r e e n C o m m u n i c a t i o n G C S - 1 5 0 0 iS y s t e mAppendix A Programming the Watchdog Timer A-2A.1 ProgrammingGCS-1500i utilizes ITE 8781 chipset as its watchdogtimer controller. Below are the procedures to complete itsconfiguration and the AAEON initial watchdog timerprogram is also attached based on which you candevelop customized program to fit your application.Configuring Sequence DescriptionAfter the hardware reset or power-on reset, the ITE 8781 enters thenormal mode with all logical devices disabled exceptKBC. The initial state (enable bit ) of this logical device (KBC) isdetermined by the state of pin 121 (DTR1#) at the falling edge ofthe system reset during power-on reset. |
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