Abit NI8 SLI Series User Manual

Contents

Abit NI8 SLI Series User Manual Manual pdf 75 page image

POST Code Definition I-1Appendix I. POST Code DefinitionAWARD POST Code DefinitionsPOST(hex) DescriptionCF Test CMOS R/W functionalityC0Early chipset initialization:-Disable shadow RAM-Disable L2 cache (socket 7 or below)-Program basic chipset registersC1Detect memory-Auto-detection of DRAM size, type and ECC-Auto-detection of L2 cache (socket 7 or below)C3 Expand compressed BIOS code to DRAMC5 Call chipset hook to copy BIOS back to E000 & F000 shadow RAM01 Expand the Xgroup codes locating in physical address 1000:003 Initial Superio_Early_Init switch05 1. Blank out screen2. Clear CMOS error flag07 1. Clear 8042 interface2. Initialize 8042 self-test08 1. Test special keyboard controller for Winbond 977 series Super I/O chips2. Enable keyboard interface0A1. Disable PS/2 mouse interface (optional)2. Auto detect ports for keyboard & mouse followed by a port & interface swap (optional)3. Reset keyboard for Winbond 977 series Super I/O chips0E Test F000h segment shadow to see whether it is R/W-able or not. If test fails, keepbeeping the speaker10 Auto detect flash type to load appropriate flash R/W codes into the run time area in F000for ESCD & DMI support12 Use walking 1ís algorithm to check out interface in CMOS circuitry. Also set real-timeclock power status, and then check for override14 Program chipset default values into chipset. Chipset default values are MODBINable byOEM customers16 Initial onboard clock generator if Early_Init_Onboard_Generator is defined. See alsoPOST 26.18 Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586or 686)1B Initial interrupts vector table. If no special specified, all H/W interrupts are directed toSPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR.1D Initial EARLY_PM_INIT switchUserís Manual