Acer Aspire T320 Service Manual

Also see for Aspire T320: User guide Guía del usuario Manuel d'utilisation

Contents

Chapter 4 58POST Check PointsWhen POST executes a task, it uses a series of preset numbers called check point to be latched at port 80h,indicating the stages it is currently running. This latch can be read and shown on a debug board.The following table describes the Acer common tasks carried out by POST. A unique check point numberrepresents each task.Checkpoint DescriptionCFh Test CMOS R/W functionalityC0h Early chipset initialization:• Disable shadow RAM• Disable L2 Cache (socket 7 or below)• Program basic chipset registersC1h Detect memory• Auto-detection of DRAM size, type and ECC.• Auto-detection of L2 cache (socket 7 or below)C3h Expand compressed BIOS code to DRAMC5h Call chipset hook to copy BIOS back to E000 & F000 shadow RAM0h1 Expand the Xgroup codes locating in physical address 1000:002h Reserved03h Initial Superio_Early_Init switch04h Reserved05h 1. Blank out screen2. Clear CMOS error flag06h Reserved07h 1. Clear 8042 interface2. Initialize 8042 self-test08h 1. Test special keyboard controller for Winbond 977 series Super I/Ochips2. Enable keyboard interface09h Reserved0Ah 1. Disable PS/2 mouse interface (optional)2. Auto detect ports for keyboard & mouse followed by a port & inter-face swap (optional)3. Reset keyboard for Winbond 977 series Super I/O chips0Bh Reserved0Ch Reserved0Dh Reserved0Eh Test F000h segment shadow to see whether it is R/W-able or not. Iftest fails. keep beeping the speaker.0Fh Reserved10h Auto detect flash type to load appropriate flash R/W codes into therun time area in F000 for ESCD & DMI support.11h Reserved12h Use walking 1’s algorithm to check out interface in CMOS circuitry.Also set real-time clock power status, and then check for override.13h Reserved