Chapter 4 165Post CodesThese tables describe the POST codes and descriptions during the POST.Post Code RangeSEC Phase POST Code TablePEI Phase POST Code Table:Phase POST Code RangeSEC 0x01 - 0x0FPEI 0x70 - 0x9FDXE 0x40 - 0x6FBDS 0x10 - 0x3FSMM 0xA0 - 0xBFS3 0xC0 - 0xCFASL 0x51 – 0x550xE1 – 0xE4PostBDS 0xF9 – 0xFEInsydeH2ODDT™Reserve0xD0 – 0xD7OEM Reserve 0xE8 – 0xEBReserved 0xD8 – 0xE00xE5 – 0xE70xEC – 0xF8Functionality Name (Include\PostCode.h) Phase PostCode DescriptionSEC_SYSTEM_POWER_ON SEC 1 CPU power on and switch toProtected modeSEC_BEFORE_MICROCODE_PATCH SEC 2 Patching CPU microcodeSEC_AFTER_MICROCODE_PATCH SEC 3 Setup Cache as RAMSEC_ACCESS_CSR SEC 4 PCIE MMIO Base Address initialSEC_GENERIC_MSRINIT SEC 5 CPU Generic MSR initializationSEC_CPU_SPEEDCFG SEC 6 Setup CPU speedSEC_SETUP_CAR_OK SEC 7 Cache as RAM testSEC_FORCE_MAX_RATIO SEC 8 Tune CPU frequency ratio tomaximum levelSEC_GO_TO_SECSTARTUP SEC 9 Setup BIOS ROM cacheSEC_GO_TO_PEICORE SEC 0A Enter Boot Firmware VolumeFunctionality Name (Include\PostCode.h) Phase PostCode DescriptionPEI_SIO_INIT PEI 70 Super I/O InitializationPEI_CPU_REG_INIT PEI 71 CPU Early InitializationPEI_PCIE_MMIO_INIT PEI 74 PCIE MMIO BAR InitializationPEI_NB_REG_INIT PEI 75 North Bridge Early InitializationPEI_SB_REG_INIT PEI 76 South Bridge Early InitializationPEI_TPM_INIT PEI 78 TPM InitializationPEI_SMBUS_INIT PEI 79 SMBUS Early Initialization
