99 AIMB-503 User ManualAppendix B I/O Pin AssignmentsB.26 DMA Channel AssignmentsB.27 Interrupt AssignmentsB.28 1st MB Memory MapTable B.27: DMA Channel AssignmentsChannel Function0 Available1 Available2 Available3 ECP Printer Port (LPT1)4 Cascade for DMA controller 15 Available6 Available7 AvailableTable B.28: Interrupt AssignmentsPriority Interrupt# Interrupt source1 NMI Parity error detected2 IRQ0 Interval timer3 IRQ1 Keyboard- IRQ2 Interrupt from controller 2 (cascade)4 IRQ8 Real-time clock5 IRQ9 Cascaded to INT 0A (IRQ 2)6 IRQ10 Serial communication port 3/4/5/67 IRQ11 Serial communication port 7/8/9/108 IRQ12 PS/2 mouse9 IRQ13 INT from co-processor10 IRQ14 Primary IDE Channel11 IRQ15 Secondary IDE Channel12 IRQ3 Serial communication port 213 IRQ4 Serial communication port 114 IRQ5 Available15 IRQ6 Available16 IRQ7 Parallel port 1 (print port)Table B.29: 1st MB Memory MapAddr. range (Hex) DeviceE0000h - FFFFFh BIOSCC000h - DFFFFh UnusedC0000h - CBFFFh VGA BIOSA0000h - BFFFFh Video Memory00000h - 9FFFFh Base memory
