— 9 —7-4. Reset circuitThe voltage fluctuation of VDD is controlled of IC10 (S-80727AN).CPU is done Reset by pushing Reset Switch or drifting VDD.7-5. Data communication between CPU and EEPROM IC11(BR93LC46A).EEPROM is Rom that write / erase is possible electrically.BR93LC46A is a non- volatile register, and serial data of 16 bit can be memorized with 64register.CS: Chip selectSK: Serial data clockDI: Serial data inputDO: Serial data output64 words X 16 bits 1,024 bitsVdd S-80727AN2 3 1Reset SWCPUReset17CPU EEPRomCSSKDIDOEEPCSAD2AD1AD0123436141516