dCS Scarlatti DAC User Manual Software Issue 1.2xAugust 2011Flename: Scarlatti DAC Manual v1_2x.docx Page 16 English versionREAR PANELANALOGUE OUTPUTSLEFT RIGHT RIGHTLEFTAES 1 AES 2RCA 1RCA 2SPDIFDIGITAL INPUTS TOSLINK CH 1 CH 2BNCIN OUTDSD/SDIFWCLK1394SUC50/60 Hz, 50WFUSET 500mA L~K L M NOP R S T UQV W XFigure 5 – Rear panelAnalogue OutputsThe unit features separately buffered Balanced Outputs (K) on XLR connectors and UnbalancedOutputs (L) on RCA connectors. The Balanced Outputs should be connected to true balanced inputsonly. If your preamplifier / power amplifier has unbalanced inputs (even if the inputs are on XLRconnectors), please use the Unbalanced Outputs instead.AES Digital InputsThe AES1 and AES2 inputs (M) can be used individually at sample rates up to 192kS/s.If the Dual AES menu page is set to On or Auto, they can be used together as a Dual AES pair at88.2, 96, 176.4 or 192kS/s. For Dual AES mode to work correctly, the source must actually generateDual AES data, not just single AES on 2 connectors!SPDIF Digital InputsThe unit features 3 co-ax SPDIF inputs, labelled RCA1, RCA2 (N) and BNC (P), as well as an opticalSPDIF input on a Toslink connector (O). Pull out the dust cover before using the Toslink input. Theseinputs will accept sample rates up to 192kS/s, but note that operation of the Toslink input is notguaranteed above 96kS/s.DSD/SDIF Digital InterfaceThe DSD/SDIF interface will accept either SDIF-2 PCM data at sample rates up to 96kS/s, or SDIF-2DSD data. The unit automatically detects the data format and sets the correct mode. The interfaceconsists of two data inputs labelled CH1 and CH2 (Q). Operation in SDIF mode requires that a wordclock from the source is connected to the WCLK In connector (R).