Dell PowerEdge M710 Technical Guide 268 Chipset8.1 OverviewThe PowerEdge™ M710 planar incorporates the Intel® 5520 chipset for I/O and processor interfacingthat was designed to support Intel Xeon® Processor 5500 and 5600 series, QuickPath Interconnect,and PCIe Gen2.8.2 Intel 5520 I/O HubThe PowerEdge M710 system board incorporates the Intel 5520 chipset 36D I/O Hub (IOH) to providea link between the processors and the I/O components. The main components of the IOH consist oftwo full-width QuickPath Interconnect links (one to each processor), 36 lanes of PCIe Gen2, and a x4Direct Media Interface (DMI) and an integrated IOxAPIC.8.2.1 QuickPath InterconnectThe QuickPath Interconnect (QPI) architecture consists of serial point-to-point interconnects for theprocessors and the IOH. The M710 has a total of three QPI links: one link connecting the processorsand links connecting both processors with the IOH. Each link consists of 20 lanes (full-width) in eachdirection with a link speed maximum of 6.4 GT/s. An additional lane is reserved for a forwardedclock. Data is sent over the QPI links as packets.The QuickPath Architecture implemented in the IOH and CPUs features four layers. The physicallayer consists of the actual connection between components. It supports Polarity Inversion and LaneReversal for optimizing component placement and routing. The Link layer is responsible for flowcontrol and the reliable transmission of data. The Routing layer is responsible for the routing of QPIdata packets. Finally, the Protocol layer is responsible for high-level protocol communications,including the implementation of a MESIF (Modify, Exclusive, Shared, Invalid, Forward) cachecoherence protocol.8.2.2 PCI Express Generation 2PCI Express (PCIe) is a serial point‐to‐point interconnect for I/O devices. PCIe Generation 2 (Gen2)doubles the signaling bit rate of each lane from 2.5 Gb/s to 5 Gb/s. Each of the PCIe Gen2 ports isbackward‐compatible with Gen1 transfer rates.8.2.3 Direct Media Interface (DMI)The DMI (previously called the Enterprise Southbridge Interface) connects the Intel 7500 Legacy IOHwith the Intel I/O Controller Hub (ICH). The DMI is equivalent to an x4 PCIe Gen1 link with a transferrate of 1 GB/s in each direction.8.3 Intel I/O Controller Hub 9The Intel I/O Controller Hub 9 (ICH9) is a highly integrated I/O controller supporting the followingfunctions:• PCI Bus 32-bit Interface Rev 2.3 running at 33 MT/s• Serial ATA (SATA) ports with transfer rates up to 300 MB/s• Six UHCI and two EHCI (high-speed 2.0) USB host controllers• Power management interface (ACPI 3.0b compliant)• Platform Environmental Control Interface (PECI)• I/O interrupt controller