Dell PowerEdge R820 Technical Manual

Also see for PowerEdge R820: Manual Installation Installation Portfolio guide Getting started guide

Contents

25 PowerEdge R820 Technical GuideTable 13. Select Network Adapter selection for racks10GbEthernet10GbConverged1GbEthernet1GbConvergedRunningProtocols LAN LAN+ISCSILAN+FCoELAN+ISCSI+FCoE LAN LAN+ISCSIRacksBroadcom578002x1Gb+2x10Gb SFP+Broadcom578002x1Gb+2x10Gb SFP+- -Broadcom5720 4x1GbBTBroadcom5720 4x1GbBTIntel i5402x1Gb+32x10Gb BTIntel i5402x1Gb+32x10Gb BT- - Intel i3504x1Gb BTIntel i3504x1Gb BTSystem management integrationWith R820, the job of deploying, updating, monitoring and maintaining the Select Network Adaptersis fast and easy. System management integration features include the following: Pre-boot: Use the Dell Lifecycle Controller graphical user interface (GUI) to set configurationsuch as bandwidth allocation or firmware revision level Post-boot: Agent-free out-of-band or high-speed in-band connection over LOM through theOperating System/BMC pass-through feature for sensory information Automation of firmware and driver version deployment upon component replacement Automatic monitoring of NIC status and notification on SNMP traps Local or remote re-configuration of any NIC, physical or virtual PXE boot enabled on all LOM and NDCs for ease of use Boot from SAN (iSCSI, FCoE) configuration for networking devices through the LifecycleController GUIPCIe expansionThe R820 provides expanded PCIe slot capability over the previous servers. This is made possible bythe 40 PCIe lanes available from each processor in the system. Dell designed the R820 to be PCIe3.0-compliant in order to take full advantage of the processor capabilities.PCIe slotsPCIe connectivity is integrated with the processor in that the number of processors in a systemimpacts the number of PCIe slots and the bandwidth of each PCIe slot. Slot 1: half-length, full-height, CPU2, PCIe 3.0 x16 (x16 connector), right riser 1 Slot 2: half-length, full-height, CPU2, PCIe 3.0 x8 (x16 connector), right riser 1 Slot 3: half-length, low-profile, CPU1, PCIe 3.0 x8 (x16 connector), center riser 2 Slot 4: half-length, low-profile, CPU2, PCIe 3.0 x8 (x16 connector), center riser 2 Slot 5: half-length, low-profile, CPU2, PCIe 3.0 x8 (x16 connector), center riser 2 Slot 6: half-length, full-height, CPU1, PCIe 3.0 x16 (x16 connector), left riser 3 Slot 7: half-length, full-height, CPU1, PCIe 3.0 x8 (x8 connector), left riser 3