Denon ADV-700 Service Manual

Also see for ADV-700: Brochure & specs Operating instructions Operating instructions Operating instructions Service manual

21ADV-700Pin Name FunctionPin No. I/O Pin Name FunctionPin No. I/O56 DMA 3 O DRAM address bus57 DMA 4 O DRAM address bus58 DMA 5 O DRAM address bus59 Vcc I 3.6V power supply60 Vss I GND61 DMA 6 O DRAM address bus62 DMA 7 O DRAM address bus63 DMA 8 O DRAM address bus64 DMA 9 O DRAM address bus65 DMA 10 O DRAM address bus66 DMA 11 O DRAM address bus67 Vss I GND68 Vcc I 3.6V power supply69 DCAS# O Column address strobe, active low70 DOE# O Output enable, active lowDSCK_EN I Clock enable, active low71 DWE# O DRAM write enable, active low72 DRAS 0# O Row address strobe, active low73 DRAS 1# O Row address strobe, active low74 DRAS 2# O Row address strobe, active low75 Vcc I 3.6V power supply76 Vss I GND77 DB 0 I/O DRAM data bus78 DB 1 I/O DRAM data bus79 DB 2 I/O DRAM data bus80 DB 3 I/O DRAM data bus81 DB 4 I/O DRAM data bus82 DB 5 I/O DRAM data bus83 Vcc I 3.6V power supply84 Vss I GND85 DB 6 I/O DRAM data bus86 DB 7 I/O DRAM data bus87 DB 8 I/O DRAM data bus88 DB 9 I/O DRAM data bus89 DB 10 I/O DRAM data bus90 DB 11 I/O DRAM data bus91 Vss I GND92 Vcc I 3.6V power supply93 DB 12 I/O DRAM data bus94 DB 13 I/O DRAM data bus95 DB 14 I/O DRAM data bus96 DB 15 I/O DRAM data bus97 DCS 1# O SDRAM chip select [1], active low98 Vss I GND99 Vcc I 3.6V power supply100 DCS 0# O SDRAM chip select [0], active low101 DQM O Data input/output mask102 DSCK O Clock to SDRAM103 Vss I GND104 Vcc I 3.6V power supply105 DCLK I Clock input (27MHz)106 YUV 0 O 8-bit YUV output107 YUV 1 O 8-bit YUV output108 YUV 2 O 8-bit YUV output109 YUV 3 O 8-bit YUV output110 YUV 4 O 8-bit YUV output111 Vcc I 3.6V power supply112 Vss I GND113 YUV 5 O 8-bit YUV output114 YUV 6 O 8-bit YUV output115 YUV 7 O 8-bit YUV output116 PCLK2XSCN I/O 2X pixel clock117 PCLKQSCN I/O Pixel clock118 VSYNCH# I/OVertical sync for screen video interface,programmable for rising or falling edge,active low119 HSYNCH# I/OHorizontal sync for screen videointerface, programmable for rising orfalling edge, active low120 Vss I GND121 Vcc I 3.6V power supply122 HD 0 I/O Host data bus123 HD 1 I/O Host data bus124 HD 2 I/O Host data bus125 HD 3 I/O Host data bus126 HD 4 I/O Host data bus127 HD 5 I/O Host data bus128 HD 6 I/O Host data bus129 Vss I GND130 Vcc I 3.6V power supply131 HD 7 I/O Host data bus132 HD 8 I/O Host data bus133 HD 9 I/O Host data bus134 HD 10 I/O Host data bus135 HD 11 I/O Host data bus136 HD 12 I/O Host data bus137 HD 13 I/O Host data bus138 Vss I GND139 Vcc I 3.6V power supply140 HD 14 I/O Host data bus141 HD 15 I/O Host data bus142 HWRQ# O Host write request143 HRDQ# O Host read request144 HIRQ I/O Host interrupt145 HRST# O Host reset146 HIORDY I Host I/O ready147 Vss I GND148 Vcc I 3.6V power supply149HWR# O Host write requestHWR#/DCI_ACK# I, I Host write / DCI interface acknowledgesignal, active low150 HRD#/DCI_CLK I, I Host read / DCI interface clock151 HIOCS16# I Device 16-bit data transfer152 HCS1FX# O Host select 1153 HCS3FX# O Host select 3154 HA 0 I/O Host address bus155 HA 1 I/O Host address buswww . xiaoyu163. comQQ 376315150 992894298TEL 13942296513 992894298051513673QQTEL 13942296513 QQ 376315150 892498299TEL 13942296513 QQ 376315150 892498299http://www.xiaoyu163.comhttp://www.xiaoyu163.com