Denon DVD-310 Service Manual

Contents

1414DVD-310HY57V65120BTC-75 (ME: U11)PIN PIN NAME DESCRIPTIONCLK Clock The system clock input. All other inputs are registered to the SDRAM on therising edge of CLKCKE Clock Enable Controls internal clock signal and when deactivated, the SDRAM will be oneof the states among power down, suspend or self refreshCS Chip Select Enables or disables all inputs except CLK, CKE and DQMBA0,BA1 Bank Address Selects bank to be activated during RAS activitySelects bank to be read/written during CAS activityA0 ~ A11 Address Row Address : RA0 ~ RA11, Column Address : CA0 ~ CA7Auto-precharge flag : A10RAS, CAS, WERow Address Strobe,Column Address Strobe,Write EnableRAS, CAS and WE define the operationRefer function truth table for detailsLDQM, UDQM Data Input/Output Mask Controls output buffers in read mode and masks input data in write modeDQ0 ~ DQ15 Data Input/Output Multiplexed data input / output pinV DD /V SS Power Supply/Ground Power supply for internal circuits and input buffersV DDQ/V SSQ Data Output Power/Ground Power supply for output buffersNC No Connection No connectionVSSDQ15VSSQDQ14DQ13VDDQDQ12DQ11VSSQDQ10DQ9VDDQDQ8VSSNCUDQMCLKCKENCA11A9A8A7A6A5A4VSS123456789101112131415161718192021222324252627545352515049484746454443424140393837363534333231302928VDDDQ0VDDQDQ1DQ2VSSQDQ3DQ4VDDQDQ5DQ6VSSQDQ7VDDLDQM/WE/CAS/RAS/CSBA0BA1A10/APA0A1A2A3VDDPIN DESCRIPTION