Denon UD-M31 Service Manual

Also see for UD-M31: Specification sheet Operating instructions Operating instructions

Contents

1717UD-M3132 JP- Input pin for tracking jump signal from DSP.33 JP+ Input pin for tracking jump signal from DSP.34 TGL Input pin for tracking gain control signal from DSP. Gain is low when TGL is high.35 TOFF Input pin for tracking off control signal from DSP. Tracking servo is off when TOFF is high.36 TES Output pin for TES signal to DSP.37 HFL The High Frequency Level is used to determine whether the main beam is positioned over a bit or over the mirrored38 SLOF Sled servo off control input pin39 CV - Input pin for CLV error signal from DSP.40 CV+ Input pin for CLV error signal from DSP.41 RFSM RF output pin.42 RFS - RF gain setting and EFM signal 3T compensation constant setting pin, along with the RFSM pin.43 SLC Slice Level Control is an output pin that controls the data slice level used by the DSP for the RF waveform.44 SLI Input pin used by DSP for controlling the data slice level.45 DGND Digital system GND pin.46 FSC Focus search smoothing capacitor output pin.47 TBC Tracking Balance Control; EF balance adjustment variable range setting pin48 NC No connection49 DEF Disc defect detection output pin.50 CLK Reference clock input pin. 4.23 MHz signal from the DSP is input.51 CL Microprocessor command clock input pin.52 DAT Microprocessor command data input pin.53 CE Microprocessor command chip enable input pin.54 DRF RF level detection output (Detect RF).55 FSS Focus Search Select; focus search mode (Å} search/+search vs. the reference voltage) switching pin56 V CC 2 Servo system and digital system VCC pin.57 REFI By-pass capacitor connection pin for reference voltage.58 VR Reference voltage output pin.59 LF2 Disc defect detection time constant setting pin.60 PH1 RF signal peak hold capacitor connection pin.61 BH1 RF signal bottom hold capacitor connection pin.62 LDD APC circuit output pin.63 LDS APC circuit input pin.64 V CC 1 RF system VCC pin.Pin No. Symbol Contents