Chapter 2. System board features 5PCI BusThe PCI bus originates in the chip set. Features of the PCI bus are:• Integrated arbiter with multi transaction PCI arbitration acceleration hooks• Zero-wait-state, microprocessor-to-PCI write interface for high-performancegraphics• Built-in PCI bus arbiter• Microprocessor-to-PCI memory write posting• Conversion of back-to-back, sequential, microprocessor-to-PCI memory write toPCI burst write• Delayed transaction• PCI parity checking and generation supportIDE bus master interfaceThe system board incorporates a PCI-to-IDE interface that complies with the ATAttachment Interface with Extensions.The bus master for the IDE interface is integrated into the I/O hub of the SIS630 chipset. The chip set is PCI 2.2 compliant. It connects directly to the PCI bus and isdesigned to allow concurrent operations on the PCI bus and IDE bus. The chip set iscapable of supporting PIO mode 0–4 devices and IDE DMA mode 0–3 devices. UltraDMA 66 transfers up to 66 Mbps using an ATA 66 cable.The IDE devices receive their power through a four-position power cable containing+5 V dc, +12 V dc, and ground voltage. As devices are added to the IDE interface,designate one device as the master, or primary, device and another as the slave, orsubordinate, device. These designations are determined by switches or jumpers oneach device. There are two IDE ports, one designated Primary and the otherSecondary, allowing for up to four devices to be attached. The total number ofphysical IDE devices is determined by available space on the system board.For the IDE interface, no resource assignments are given in the system memory or thedirect memory access (DMA) channels. For information on the resource assignments,see “Input/output address map” on page 34 and “Appendix C. IRQ and DMAchannel assignments,” on page 39.For information on the connector pin assignments, see “IDE connectors” on page 28.USB interfaceUniversal Serial Bus (USB) technology is a standard feature of your personalcomputer. The system board provides the USB interface with two connectorsintegrated into the chip set. A USB-enabled device can attach to a connector and, ifthat device is a hub, multiple peripheral devices can attach to the hub and be used bythe system. The USB connectors use Plug and Play technology for installed devices.The speed of the USB is up to 12 MBps with a maximum of 127 peripheral devices.The USB is compliant with Universal Host Controller Interface Guide 1.0.Features of USB technology include:• Plug and Play devices• Concurrent operation of multiple devices• Suitability for different device bandwidths