IBM System x3620 M3 Product Manual

Also see for System x3620 M3 7376: Installation and user guide Installation and user guide Manual

Contents

A cost-optimized storage-rich alternative to traditional enterprise 2U dual-socket serversPlease see the Legal Information section for important notices and information. 5concurrently.Intelligent Power Capability powers individual processor elements on and off as needed, toreduce power draw.Execute Disable Bit functionality can help prevent certain classes of malicious buffer overflowattacks when combined with a supporting operating system.Intel’s Virtualization Technology (VT) integrates hardware-level virtualization hooks that allowoperating system vendors to better utilize the hardware for virtualization workloads.DDR3 Memory with Chipkill ECC ProtectionThe x3620 M3 ships with registered double data rate III (DDR3) memory and provides ActiveMemory features, including advanced Chipkill memory protection (using x4 DIMMs), for up to16X better error correction than standard ECC memory. In addition to offering better performancethan DDR2 or fully-buffered memory, DDR3 memory also uses less energy. DDR2 memoryalready offered up to 37% lower energy use than fully buffered memory. Now, a generation later,DDR3 memory is even more efficient, using up to 15% less energy than DDR2 memory.The x3620 M3 currently supports up to 96GB of 1.5V RDIMM (registered DIMM) memory in 12DIMM slots. The x3620 M3 also supports either standard 1.5V DIMMs, or 1.35V DIMMs thatconsume 20% less energy. Redesign in the architecture of the Xeon 5500 and 5600 Seriesprocessors bring radical changes in the way memory works in these servers. For example, theXeon 5500 and 5600 Series processors integrate the memory controller inside theprocessor, resulting in two memory controllers in a 2-socket system. Each memory controllerhas three memory channels. Depending on the type of memory, population of memory, andprocessor model, the memory may be clocked at 1333MHz, 1066MHz or 800MHz.Notes: Adding a second processor not only doubles the amount of memory available for use, butalso doubles the number of memory controllers, thus doubling the system memory bandwidth. Ifyou add a second processor, but no additional memory for the second processor, the secondprocessor would have to access the memory from the first processor “remotely,” resulting inlonger latencies and lower performance. The latency to access remote memory is almost 75%higher than local memory access. So, the goal should be to always populate both processors withmemory.The L5640 and X56xx processor models support up to 1333MHz memory clock speed. With newsingle-rank and dual-rank RDIMMs, L5640 and Xi56xx processors support 2 DIMMs per channel(2DPC) at 1333MHz using 1.5V DIMMs. The E562x-and-up and L56xx models support amaximum of 1066MHz clock speed (and thus memory access rate), and the E550x modelssupport 800MHz clock speed.Running memory at 1333MHz (where supported) versus 1066MHz offers up to 9% betterperformance, while memory running at 1066MHz produces up to 28% better performance thanmemory running at 800MHz. Xeon 5500/5600 Series processors access memory with almost50% lower latency than the earlier 5400 Series processors. That can result in faster processingof latency-sensitive workloads.Regardless of memory speed, the Xeon 5500/5600 platform represents a significant improvementin memory bandwidth over the previous Xeon 5400 platform. At 1333MHz, the improvement isalmost 500% over the previous generation. This huge improvement is mainly due to the dualintegrated memory controllers and faster DDR3 1333MHz memory. Throughput at 800MHz is 25gigabytes per second (GBps); at 1066MHz it’s 32GBps; and at 1333MHz it’s 35GBps. Thisimprovement translates into improved application performance and scalability.Memory interleaving refers to how physical memory is interleaved across the physical DIMMs. Abalanced system provides the best interleaving. A Xeon 5500/5600 Series processor-basedsystem is balanced when all memory channels on a socket have the same amount of memory.Ch1Ch0Xeon 5600 / 5500Processor 1Memory Controller23Ch27856Xeon 5600 / 5500Processor 2Ch01011Ch21516Ch11314QPI Memory Controller