Combining high-performance architecture with high-performance Xeon processorsPlease see the Legal Information section for important notices and information. 4twice as many FSBs as before and each is 60% faster than before.Intel Extended Memory 64 Technology (EM64T) 64-bit extensions allow the Xeon processorto use large memory addressing when running with a 64-bit operating system. This in turn letsindividual software processes directly access more than 4GB of RAM, which was the limit of 32-bit addressing. This can result in much higher performance for certain kinds of programs, suchas database management and CAD. Additional registers and instructions (SSE3) can furtherboost performance for applications written to use them. Customers should contact their softwareprovider to determine their software support for EM64T.Intel’s Virtualization Technology (VT) integrates hardware-level virtualization hooks that allowoperating system vendors to better utilize the hardware for virtualization workloads, a keyworkload for the eX4 platform.eX4 Chipset ‘Snoop’ FilteringOne of the core features of the eX4 chipset that gives the platform a performance advantage isthe snoop filter. The Xeon Coherency Protocol or “snoop” is an operation that occurs whenevera processor in an SMP system needs to update a memory address during normal operation.The snoop occurs when the processor getting ready to operate on a piece of data asks the otherprocessors in the SMP complex to verify they have not modified the same piece of data withoutwriting back from their cache. This operation increases traffic on the front side bus.The eX4 chipset contains 324MB of EDRAM within the Northbridge chip. This copies all data asit is written to the processor cache, allowing the chipset to respond directly to the snooprequests. This reduces the overall traffic across the FSB and helps to improve systemperformance over other architectures. (Intel now offers a first-generation snoop filter in their7300 chipset; however it contains only 64MB of RAM which is 80% smaller than the eX4 fourth-generation solution.)Advanced Buffer eXecutionThe IBM Advanced BuffereXecution (ABX) chips (2 perchassis) provide the x3850 M2 /3950 M2’s DDR2 memory withup to 60% more bandwidth thanother vendors can manage usingmore expensive (and moreenergy-hungry) Fully BufferedDIMMs (FB-DIMMs). The ABXchip uses two buffers permemory card to re-drive thesignals from the eX4 memorycontroller to the DIMMs,bypassing the latency-addingbuffers used on each FB-DIMM.The use of ABX reduceslatency by 20% vs. FB-DIMMs.This feature is a unique IBMenhancement, not offered byother x86 server architectures(using either Intel or AMD processors).XceL4v Dynamic Server CacheAnother performance feature of the eX4 chipset is the XceL4v L4 cache. When using a singlenode (chassis), the cache works with the snoop filter to help reduce FSB traffic. When morethan one node is used, 256MB of virtual cache per node (taken from main memory) is used forinterprocessor communications between chassis, to keep data in synch. In a 4chassisconfiguration, this amounts to as much as 1GB of L4 cache. This not only compensates for anyperformance hit that might otherwise result from sending data across the distances betweenprocessors in multiple chassis, it actually results in a performance improvement versus a singlechassis. (IBM X3 and eX4 servers have achieved well over 100 #1 results on industry-standardbenchmarks, such as TPC-C, TPC-E, TPC-H, SAP SD, vConsolidate, Vmark, and more.)This feature is a unique IBM enhancement, not offered by other x86 server architectures (usingeither Intel or AMD processors).Scalable Virtual L4cacheIB: 2 x12533MT/s1066 MT/s2.5 GT/sSP: 3 x82.1GT/sIA32Proc1066 MT/s1066 MT/sIA32Proc1066 MT/s1066 MT/sIA32ProcIA32Proc2.1GT/sGT/sGT/sGT/sLPCESISouthBridgeI/FMemoryDIMMSFlashI/FeX4 chipsetNovax4Novax4Novax4Novax4Novax4Novax4Novax4Novax4