2.8 D/A ConversionThe A-812PG provides two 12 bits D/A converters. Before using the D/Aconversion function, user should notice the following issue:z D/A output register, BASE+4/BASE+5/BASE+6/BASE+7,z JP3 select internal reference voltage 5V/ 10Vz JP1/JP2 select internal/external reference voltagez If JP1/JP2 select internal and JP3 select 5V, the D/A output range from 0 to 5Vz If JP1/JP2 select internal and JP3 select 10V, the D/A output range from 0 to 10Vz If JP1/JP2 select external, the external reference voltage can be AC/DC +/- 10VThe block diagram is given as below:A-812PGD/A channel 0Base+4/+5RefJP1JP2JP35/ 10 VInternalReferenceD/A channel 1D0..D7Base+6/+7Ref1317152,4…20AnalogGndV0+ V0-Vref0+ Vref0-V1+ V1-Vref1+19Vref1-CN2NOTE : The DA output latch registers are designed as “double buffer” structure. Theuser must send the low byte data first, then send the high bytedata to store the DA 12 bits digital data. If the user only sends the high bytedata, then the low byte data will be still the previous value. Also if the user sends high bytefirst then send low byte, the low byte data of DA are still hold in the previous one.A-812PG Hardware Manual (Ver.1.2, Sep/2005, IPH-004-12) ----- 31