49Appendix C. Watch-Dog TimerThe WatchDog Timer is provided to ensure that standalone systemscan always recover from catastrophic conditions that cause the CPUto crash. This condition may have occurred by external EMI or asoftware bug. When the CPU stops working correctly, hardware onthe board will either perform a hardware reset (cold boot) or a Non-Maskable Interrupt (NMI) to bring the system back to a known state.Two I/O ports control the WatchDog Timer :.443(hex)Read Enable to refresh the WatchDogTimer.843(hex)Read Disable the WatchDog Timer.To enable the WatchDog Timer, a read from I/O port 443H must beperformed. This will enable and activate the countdown timer whichwill eventually time-out and either reset the CPU or cause a NMI,depending on the setting of JP11. To ensure that this reset conditiondoes not occur, the WatchDog Timer must be periodically refreshedby reading the same I/O port 433H. This must be done within thetime-out period that is selected by jumper group JP16.A tolerance of at least 30% must be maintained to avoidunknown routines within the operating system (DOS), such asdisk I/O that can be very time-consuming. Therefore, if the timeout period has been set to 10 seconds, the I/O port 443H mustbe read within 7 seconds.Note: when exiting a program it is necessary to disable theWatchDog Timer, otherwise the system will reset.