IEI Technology IMB-X63 Series User Manual

IEI Technology IMB-X63 Series User Manual Manual pdf 35 page image

Chapter 3 BIOS Setup31User’s Manual3.5 Advanced Chipset FeaturesWhen you select the ADVANCED CHIPSET FEATURES SETUP on the main program, the screen display willappears as:Advanced Chipset Features ScreenPhoenix - Award BIOS CMOS Setup UtilityAdvanced Chipset FeaturesSpread Spectrum [Disabled] Item Helpf DRAM Clock/ Drive Control [Press Enter] Menu Level ff AGP & P2P Bridge Control [Press Enter]f CPU & PCI Bus Control [Press Enter]Memory Hole [Disabled]System BIOS Cacheable [Enabled]Video RAM Cacheable [Enabled]VGA Share Memory Size [16M]Ç È ÆÅ Move Enter: Select +/-/PU/PD: Value F10: Save Esc: Exit F1: General HelpF5: Previous Values F7: Optimized DefaultsSpread Spectrum: When the system clock generator pulses, the extreme values of the pulse generateexcess EMI. Enabling pulse spectrum spread modulation changes the extreme values from spikes to flat curves,thus reducing EMI. This benefit may in some cases be outweighed by problems with timing-critical devices,such as a clock-sensitive SCSI device.DRAM Clock/Drive Control: To control the Clock. If you highlight the literal “Press Enter” next to the “DRAMClock” label and then press the enter key, it will take you a submenu with the following options:DRAM Clock: This item determines DRAM clock following 100MHz, 133MHz or By SPD.The Choices: 100MHz, 133MHz, By SPD (default).AGP & P2P Bridge Control: Enter to Control AGP & P2P Bridge Item.CPU & PCI Bus Control: Enter to Control CPU & PCI Bus Item.Memory Hole: In order to improve performance, certain space in memory can be reserved for ISA cards.This memory must be mapped into the memory space below 16MB.System BIOS Cacheable: Selecting Enabled allows caching of the system BIOS ROM at F0000h - FFFFFh,resulting in better system performance. However, if any program writes to this memory area, a system errormay result. The settings are Enabled and Disabled.