PCIE-9452 PICMG 1.3 CPU CardPage vi2.6 I NTEL ® ICH7R S OUTHBRIDGE CHIPSET ................................................................... 172.6.1 Intel ® ICH7R Overview.................................................................................... 172.6.2 Intel ® ICH7R Audio Codec ’97 Controller ...................................................... 172.6.3 Intel ® ICH7R IDE Interface............................................................................. 182.6.4 Intel ® ICH7R Low Pin Count (LPC) Interface ................................................ 192.6.5 Intel ® ICH7R PCI Interface ............................................................................. 192.6.6 Intel ® ICH7R Real Time Clock ........................................................................ 192.6.7 Intel ® ICH7R SATA Controller......................................................................... 192.6.8 Intel ® ICH7R USB Controller.......................................................................... 202.6.8.1 Intel® ICH7R USB Controller Overview.................................................. 202.6.8.2 PCIE-9452 USB Implementation ............................................................. 202.6.8.3 Backplane USB Implementation............................................................... 202.6.9 Intel ® ICH7R PCIe Bus.................................................................................... 212.6.9.1 Intel® ICH7R PCIe Bus Overview............................................................ 212.6.9.2 PCIe x4 Expansion Options ...................................................................... 212.6.9.3 PCIe GbE Ethernet.................................................................................... 222.7 LPC B US COMPONENTS ........................................................................................... 232.7.1 LPC Bus Overview........................................................................................... 232.7.2 BIOS Chipset.................................................................................................... 232.7.3 Super I/O chipset.............................................................................................. 242.7.3.1 Super I/O LPC Interface ........................................................................... 252.7.3.2 Super I/O 16C550 UARTs ........................................................................ 252.7.3.3 Super I/O Enhanced Hardware Monitor ................................................... 252.7.3.4 Super I/O Fan Speed Controller................................................................ 252.7.3.5 Super I/O Parallel Port .............................................................................. 262.7.3.6 Super I/O Keyboard Controller................................................................. 262.8 ENVIRONMENTAL AND POWER SPECIFICATIONS ....................................................... 262.8.1 System Monitoring ........................................................................................... 262.8.2 Operating Temperature and Temperature Control........................................... 272.8.3 Power Consumption......................................................................................... 282.9 EXPANSION OPTIONS ................................................................................................ 282.9.1 Expansion Options Overview........................................................................... 282.9.2 IEI Expansion PICMG 1.3 Backplanes ........................................................... 282.9.3 IEI Chassis ....................................................................................................... 29