PCIE-Q57A PICMG 1.3 CPU CardPage 138computer is usually a male DE-9 connector.DAC The Digital-to-Analog Converter (DAC) converts digital signals toanalog signals.DDR Double Data Rate refers to a data bus transferring data on both therising and falling edges of the clock signal.DMA Direct Memory Access (DMA) enables some peripheral devices tobypass the system processor and communicate directly with thesystem memory.DIMM Dual Inline Memory Modules are a type of RAM that offer a 64-bit databus and have separate electrical contacts on each side of the module.EHCI The Enhanced Host Controller Interface (EHCI) specification is aregister-level interface description for USB 2.0 Host Controllers.GbE Gigabit Ethernet (GbE) is an Ethernet version that transfers data at 1.0Gbps and complies with the 3 IEEE 802.3-2005 standard.GPIO General purpose inputIrDA Infrared Data Association (IrDA) specify infrared data transmissionprotocols used to enable electronic devices to wirelessly communicatewith each other.L1 Cache The Level 1 Cache (L1 Cache) is a small memory cache built into thesystem processor.L2 Cache The Level 2 Cache (L2 Cache) is an external processor memory cache.LVDS Low-voltage differential signaling (LVDS) is a dual-wire, high-speeddifferential electrical signaling system commonly used to connect LCDdisplays to a computer.MAC The Media Access Control (MAC) protocol enables several terminals ornetwork nodes to communicate in a LAN, or other multipoint networks.
