Icom IC-E7 Service Manual

Also see for IC-E7: Instruction manual Service manual Instruction manual

Contents

4 - 4Input RegisterOSCCounterPre-scalerPhaseDetectorChargePumpLoop filterABLoop filterX215.3 MHz15.3/45.9 MHz2nd LO signal8Bufferamp.Bufferamp.LOamp.Q19DoublerQ18Q2Q14Q29121314“PCK”15×1×3“PUL” signal to the CPU (IC4, pin 35) from the CPU (IC4)PLL IC control signalsPLL IC (IC15)VCO BOARD• PLL AND VCO CIRCUITSMAIN UNIT“PDA”“PSTB”20611225IC19IC225Q8, Q14, D5430 MHz VCOQ10, Q13, D7, D850 MHz VCOQ9, Q12, D6144 MHz VCOTCXOReferenceCounterLPFHPFD51D52D12D13D16LOLV2 LV1 FIND17×2 D18D56Transmit signalto the PA board1st LO signals to the1st mixer (IC16, pin 3)Loop filterSwitch ALoop filterSwitch B4-3 PLL CIRCUITS4-3-1 VCO CIRCUITS (VCO BOARD)This transceiver has 3 VCOs; 50 MHz VCO, 144 MHz VCOand 430 MHz VCO. The 50 MHz VCO oscillates the 1st LOsignals, 144 MHz VCO and 430 MHz VCO oscillate bothtransmit output and 1st LO signals.• 50 MHz VCOThe 50 MHz VCO (Q10, Q13, D7, D8) generates the 1st LOsignals for receiving 0.5–76 MHz band signals. The outputsignals are amplified at the buffer amplifiers (Q14, Q19),and passed through the doubler switches (D13, D17), andthen applied to the 1st mixer (IC16, pin 3) via TX/RX switch(MAIN UNIT; D56).• 144 MHz VCOThe 144 MHz VCO (Q9, Q12, D6) generates both of transmitoutput signal for 144 MHz band and 1st LO signals forreceiving 76–280 MHz.While receiving, the VCO oscillates the 1st LO frequency,and the VCO output signals are amplified at the bufferamplifiers (Q14, Q19). The buffer-amplified signals arepassed through the doubler switches (D13, D17), thenapplied to the 1st mixer (IC16, pin 3) via TX/RX switch(MAIN UNIT; D56).While transmitting, the VCO oscillates the transmit frequency,and the VCO output signal is amplified at the buffer amplifiers(Q14, Q19). The buffer-amplified signals are passed throughthe doubler switches (D13, D17), then applied to the PABOARD via TX/RX switch (MAIN UNIT; D18).• 430 MHz VCOThe 430 MHz VCO (Q8, Q11, D5) generates both of thetransmit output signal for 430 MHz band and 1st LO signalsfor receiving 280–990 MHz.While receiving, the VCO oscillates the 1st LO frequency,and the VCO output signals are amplified by the bufferamplifi ers (Q14, Q19).If the receiving frequency is 500 MHz and below, the buffer-amplified signals are passed through the doubler switches(D13, D17), then applied to the 1st mixer (IC16, pin 3) viaTX/RX switch (MAIN UNIT; D56).If the receiving frequency is 500 MHz and above, the buffer-amplified signals are applied to the doubler circuit (Q18,D14, D15) via doubler switch (D12). The doubled signals arethen applied to the 1st mixer (IC16, pin 3) via doubler switch(D16) and TX/RX switch (MAIN UNIT; D56).While transmitting, The VCO oscillates the transmitfrequency, and the VCO output signal is amplified at thebuffer amplifiers (Q14, Q19), then applied to the PA BOARDvia TX/RX switch (MAIN UNIT; D18).A portion of the VCO output signals generated at each VCOare applied to the PLL IC (IC18, pin 5) via buffer amplifier(Q14) and LO amplifi er (Q2) for comparison signal.4-3-2 PLL CIRCUITThe PLL circuit provides stable oscillation of the transmitfrequency and receive 1st LO frequency. The PLL circuitcompares the phase of the divided VCO frequency with thereference frequency. The PLL output frequency is controlledby the divided ratio (N-data) from the CPU.The amplified signals from LO amplifier (Q2) are applied tothe PLL IC (IC18, pin 5). The applied signals are divided atthe prescaler and OSC counter according to the “PDA” signalfrom the CPU (IC4, pin 32). The divided signal is phase-compared with the reference frequency at the phase detector.The phase difference is output from pin 20 as a pulse typesignal after being passed through the charge pump and loopfilter switch. The output signal is applied to the each VCO(VCO BOARD) after being converted into the DC voltage (lockvoltage) at the loop filters.The lock voltage for 50 MHz VCO (“LV1”) is generated bybeing passed through the the loop filter A (Q11, Q13, R68,R72, R74, R76, R80, R81, C72, C79, C80, C500) via theloop filter switch A (IC22, pins 5, 6). The lock voltage for144 MHz VCO and 430 MHz (“LV2”) is generated by beingpassed through the loop filter B (Q54, Q56, R327–R331,R337, C485, C486, C488, C501) via the loop filter switch A(IC22, pins 1, 2) and B (IC19, pins 1, 2).If the oscillated signal drifts, its phase changes from that ofthe reference frequency, causing a lock voltage change tocompensate for the drift in the oscillated frequency.