Icom IC-F5061 Servise Manual

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Contents

Icom IC-F5061 Servise Manual Manual pdf 26 page image

5 - 4PLL ICThe PLL circuit provides stable oscillation of the transmitfrequency and receive 1st LO frequency. The PLL outputfrequency is controlled by the divided ratio (N-data) from theCPU.The applied signals are divided at the prescaler andprogrammable counter according to the control signals(“SSO,” “PLST” and "SCK”) from the CPU. The divided signalis phase-compared with the reference frequency signal fromthe reference frequency oscillator (X1, pin 3), at the phasedetector.The phase difference is output from pin 4 as a pulse typesignal after being passed through the internal charge pump.The output signal is converted into the DC voltage (lockvoltage) by passing through the loop filter (Q8, Q9). The lockvoltage is applied to the variable capacitors (D10 and D13of RX VCO1, D8 and D9 of RX VCO2, D14 and D17 of TXVCO), and locked to keep the VCO frequency constant.If the oscillated signal drifts, its phase changes from that ofthe reference frequency, causing a lock voltage change tocompensate for the drift in the VCO oscillating frequency.CPU5regurator+8VreguratorR8VreguratorPower switchQ47, Q48IC18IC20Q38, Q39HVHVVCC“PWON”CPU5CPU+8V+5VreguratorQ35, Q36+5VVoltage lineControl signal414647“RXC”“TXC”R8VReceiver circuitsCommon circuitsCPU (IC14),EEPROM (IC16),etc.RF power amplifier (IC15)etc.AF power amplifier (IC21)etc.PLL IC (IC4)Transmitter circuits(IC14)Attached optional units,D/A converters,etc.Power Supply• POWER SUPPLY CIRCUITST8VreguratorQ34, Q37, D37T8V5-4 POWER SUPPLY CIRCUITS (MAIN UNIT)Voltage from the attached battery pack is routed to whole of the circuit in the transceiver via switches and regulators.