Icom IC-M402 Service Manual

Also see for IC-M402: Instruction manual Service manual

Contents

4 - 34-2-5 APC CIRCUIT (MAIN UNIT)The APC circuit stabilizes transmit output power.The RF output signal from the power amplifier (IC3) isdetected at the power detector circuit (D8, D9, L12) and isthen applied to one of the differential amplifier inputs (Q15,pin 5) via the High/Low control circuit (R71, Q16). Theapplied voltage controls the differential amplifier output(Q15, pin 2) and the bias voltage control (Q12). Thus theAPC circuit maintains a constant output power.4-3 PLL CIRCUITS4-3-1 GENERALThe PLL circuit provides stable oscillation of the transmit fre-quency and receive 1st LO frequency. The PLL circuit com-pares the phase of the divided VCO frequency to the refer-ence frequency. The PLL output frequency is controlled by acrystal oscillator and the divided ratio of the programmabledivider.IC2 on the MAIN unit is a dual PLL IC which controls bothVCO circuits for Tx and Rx, and contains a prescaler, pro-grammable counter, programmable divider, phase detector,charge pump, etc.The PLL circuit , using a one chip PLL IC (MAIN unit; IC2),directly generates the transmit frequency and receive 1st IFfrequency with VCOs. The PLL sets the divided ratio basedon serial data from the CPU on the LOGIC unit and com-pares the phases of VCO signals with the reference oscilla-tor frequency. The PLL IC detects the out-of-step phase andoutput from pins 8 for Tx and Rx. The reference frequency(21.25 MHz) is oscillated at X2 (MAIN unit).4-3-2 TX AND RX LOOP (MAIN UNIT)The generated signal at the VCO (Q4, Q5, Q6, D1–D4)enters the PLL IC (IC2, pin 2) and is divided at the pro-grammable divider section and is then applied to the phasedetector section.The phase detector compares the input signal with a refer-ence frequency, and then outputs the out-of-phase signal(pulse-type signal) from pin 8.The pulse-type signal is converted into DC voltage (lockvoltage) at the loop filter (R29–R31, R41, C41, C42, C50,C51), and is then applied to varactor diodes (D3, D4) of theVCO to stabilize the oscillated frequency. The lock voltagefrom the loop filter is amplified at the buffer amplifier (Q7)and then applied to the RF circuit.T5D8 D9L12"TMUT" signal from the CPU(LOGIC board; IC1, pin 83)HV12 34HI/LO"TXDET" signal to the CPU(LOGIC board; IC1, pin 92)Q12Q15Q14Q16C93R69R70Q11YGRamp.RF signalfrom PLL to antennaRF detectorcircuitAPC control circuitPower moduleIC3R74R73R71Shift registerPrescalerPhasedetectorLoopfilterProgrammablecounterProgrammabledividerX221.25 MHz21.25 MHz signal to theFM IF IC (IC1, pin 2)VCOBufferBufferBufferQ9Q8Q7345PSTBIC2 (PLL IC)PCKPDATAto transmitter circuitto 1st mixer circuitD6D517168 2Q4 Q6, D1 D4• APC CIRCUIT• PLL CIRCUIT