Icom IC-M72 Service Manual

Also see for IC-M72: Instruction manual Instruction manual Instruction manual

Contents

Icom IC-M72 Service Manual Manual pdf 10 page image

4-2-3 TRANSMIT AMPLIFIERS (RF UNIT)The VCO output signal is amplified to transmit output powerlevel by the transmit amplifi ers.The transmit signal from the TX/RX switch (D50) is appliedto the buffer amplifier (Q50). The amplified transmit signal isamplified to the transmit output level by the pre-driver (Q53)and power amplifier (Q54). The power-amplified transmitsignal is passed through the TX power detector of APC circuit(D91), antenna switch (D52, D90 and D353 are ON), TXpower detector for transmit indicator (D80) and LPF (as aharmonic filter; L81, L82, C80, C83−C86, C89, C226) beforebeing applied to the antenna connector (CHASSIS; J1).4-2-1 APC CIRCUIT (RF UNIT)The APC (Automatic Power Control) circuit stabilizes trans-mit output power to prevent transmit output power level changewhich is caused by load mismatching or heat effect, etc,. TheAPC circuit also selects transmit output power from high,middle and low power.The power detector circuits (D91) detects the transmit outputand converts it into DC voltage which is in proportion to thetransmit output power level. The detected voltage is appliedto the differential amplifier (IC50, pin 3). The transmit powersetting voltage “PCON” is applied to another input terminal(pin 1) as the reference voltage.The differential amplifier compares the detected voltage andreference voltage, and the difference of the voltage is outputfrom pin 4. The output voltage controls the bias of the bufferamplifier (Q50), pre-driver (Q53) and power amplifier (Q54)to reduce/increase the gain of transmit amplifiers for stabletransmit output power.The change of transmit power is carried out by the changeof reference voltage "PCON" and "LOW."4-3 PLL CIRCUITS4-3-1 VCO CIRCUIT (RF UNIT)The VCO (Q21, Q22, D21−D23) generates the both of trans-mit signal and LO signals for the 1st IF conversion. The VCOoutput signals are buffer-amplified by Q23 and Q24.While transmitting, the VCO output signal is applied to thetransmit amplifiers via TX/RX switch (D50 is ON, D51 is OFF).While receiving, the VCO output signals are applied to the 1stmixer (Q150) via the TX/RX switch (D50 is OFF, D51 is ON)the BPF (L26, C122, C123, C130, C131), to be mixed withthe received signals to produce the 21.7 MHz 1st IF signal.A portion of the VCO output is applied to the PLL IC (IC1,pin 19) via the buffer amplifier (Q25) and LPF (L20, R20,C20−C22).4-3-2 PLL CIRCUIT (RF UNIT)The PLL circuit provides stable oscillation of the transmitfrequency and receive 1st LO frequency. The PLL outputfrequency is controlled by the divided ratio (N-data) from the CPU.The buffer-amplified signals from the LPF (L20, R20, C20−C22) are applied to the PLL IC (IC1, pin 19). The appliedsignals are divided at the prescaler and programmablecounter according to the “SDATA (SDATAO)” signal fromthe CPU (MAIN UNIT; IC360, pin 10). The divided signal isphase-compared with the reference frequency signal which isdivided by reference counter, at the phase detector.The phase difference is output from pin 13 as a pulse typesignal after being passed through the charge pump. Theoutput signal is converted into the DC voltage (lock voltage) bypassed through the loop filter (R8−R10, R22, C10, C11, C24,C25). The lock voltage is applied to the variable capacitors (D22,D23) of the VCO (Q21, Q22, D21−D23) and locked to keepthe VCO frequency constant.If the oscillated signal drifts, its phase changes from that ofthe reference frequency, causing a lock voltage change tocompensate for the drift in the VCO oscillating frequency.4 - 3DATA interfacePrescalerPhasedetectorLoopfilterReferencecounterProgrammablecounterChargepumpBufferQ23BufferQ24BufferQ25 to the TX/RX switch (D50, D51)Q22, Q37, D21–D23VCOLPFto the FM IF IC(MAIN UNIT; IC170, pin 2)313719171516“PLST”“UNLK”• PLL CIRCUITS“SCK”“SDATA”X145PLL IC (RF UNIT; IC1)LPF