7KDC-BT40U/BT645UKDC-U546BTMICROCOMPUTER’S TERMINAL DESCRIPTIONPin No. Pin Name I/O Application Truth ValueTable Processing / Operation / Description87 PWIC MUTE O Power IC mute STANDBY source or momentary power-down: L,TEL mute: L88 NC - Not used Output L fi xed89 PWIC STBY O Power IC standby control POWER ON: H, POWER OFF: L90 MUTE I/O Mute L: Mute OFF, Hi-Z: Mute ON91 LX MUTE I Mute request from slave unit H: Mute ON, L: Mute OFF92 LX CON O Start-up request to slave unit H: Slave unit ON, L: Slave unit OFF93 LX RST O Forced reset to slave unit H: Reset, L: Normal94 AVSS -95 LX REQ M O Communication request to slave unit96 VREF -97 AVCC -98 LX DATA S I Data from slave unit99 LX DATA M O Data to slave unit100 LX CLK I/O LX-BUS clock• Truth value tableq CD motor controlCD MOTOR (Pin 56) CD LOEJ (Pin 57)Stop L LLoad H LEject H HBrake H Hi-zw Power supply IC (IC4) controlSEL1 (Pin 10)PS1-2 PS1-3 PS2-1 ILLUMI P-CON P-ANTL L L OFF OFF OFFL L H ON OFF OFFH L H ON ON OFFH H H ON ON ONSEL2 (Pin 11)PS1-1 PS2-2 AUDIO/SW5 AML L OFF OFFH L ON OFFH H ON ON