Kenwood KRC-444D Service Manual

Pin descriptionKRC-444D/L CIRCUIT DESCRIPTIONPin Name DescriptionLCD segment signal LCD segment signal output pin (1/2 duty, 1/2 bias LCD should be used. Framefrequency: 100 Hz, Drive voltage: VDD)LCD common signal LCD common signal output pinPower inputDevice power supply pinsDuring device operation, 5 V + 10% voltage is supplied via these pins. Either of themcan be used for supplying the power individually. The rising time of VDD should be lessthan 500 ms (0 to 4.5 V). When the rising time is too long, or when the VDD is notlowered completely to O V and then raised to 4.5 V from the voltage lower than theoperating rate, the diode switch condition for initialization is not read out correctly. Insuch cases, use the CE pin so that the diode switch status can be read out forinitialization.FM VCO input This pin inputs the FM station output signal.Since it incorporates the AC amp, cut the DC signal with the capacitor.AM VCO input This pin inputs the AM station output signal.Since it incorporates the AC amp, cut the DC signal with the capacitor.Ground Connect to the ground terminal of the set.Error OutCharge pump output of the phase detector consisting of PLL. When the frequencydivided by the oscillating frequency is higher than the reference frequency, these pinsoutput high level signals, and when it is lower than the reference frequency, they golow. When the frequency (divided by the oscillating frequency) is coincided with thereference frequency, it enters into the floating status.AF MUTEChip EnableCrystal resonatorThis pin is used to input the selected signal from the device. When operating the-PLLsection, this pin goes high, and when the PLL section is stopped, it goes low. When atlow level, the display goes off. However, a low level signal below 134 ys or high levelsignal is not accepted.Connectors of the crystal resonator.Connect the 4.5 MHz crystal resonator.Mute OutThis pin outputs the muting signal to eliminate shock noise when the PLL is unlockedand pop noise when switching between Tape and Radio, and is active low.(CMOS output)For timing details, refer to the AF Mute Out Timing Chart. When the CE pinis low, thispin is active low.Band OutFM/MW switching output pinFM: HighMW: LowWhen the MODE switch is set to ‘1"’ (Tape mode), this pin is low.When the SDK is provided, follow the SDK section.Key return signal source andKey return signal inputThis becomes the source of key return signal to read out the diode matrix forinitialization only when the power is turned on for the first time (rising time of VDD) orwhen the set is returned from the back-up condition (CE: Low to High).Then, this inputs the key return signal for the key matrix. Insert the pull-down resistor.(CMOS input /output)Key return signal source andKey return signal inputThis becomes the source of the key return signal to read out the diode matrix forinitialization only when the power is turned on for the first time (VDD rising time) orwhen returning from the back-up condition (CE goes high from low).Then, this inputs the key return signal for the key matrix. Insert the pull-down resistor.(CMOS input /output)Key return signal inputThis pin inputs the key return signal for the key matrix. Insert the pull-down resistor.(CMOS input)Key return signal sourceThis pin outputs the key return signal for the key matrix.Since the synchronous current is greatly lowered because of its configuration, thereverse-current prevention diode will be not necessary for the key source side.(CMOS output)METAL/DX/LOC LOC Out{In radio mode: DX/Local On/Off output pinWhen “LOC” is displayed on the LCD panel, high level signal is output. When it is not lit,low level signal is output. (When the power is turned on, low level status is initialized.)In tape mode: METAL On/Off output pinWhen “METAL” is displayed on the LCD panel, low levet signal is output. When it is notlit, high level signal is output. On initialization when the tape power is turned on, highlevel is output.