NX-300(G)165-3. PLL IC (IC502)The PLL IC compares the differences in phases of theVCO oscillation frequency and the VCTCXO reference fre-quency, returns the difference to the VCO CV terminal andrealizes the “Phase Locked Loop” for the return control. Thisallows the VCO oscillation frequency to accurately match(lock) the desired frequency.When the frequency is controlled by the PLL, the fre-quency convergence time increases as the frequency differ-ence increases when the set frequency is changed. To sup-plement this, the ASIC is used before control by the PLL ICto bring the VCO oscillation frequency close to the desiredfrequency. As a result, the VCO CV voltage does not changeand is always stable at approximately 2.5V.The desired frequency is set for the PLL IC by the ASIC(IC108) through the 3-line “SDO1”, “SCK1”, “/PCS_RF” se-rial bus. Whether the PLL IC is locked or not is monitored bythe ASIC through the “PLD” signal line. If the VCO is not thedesired frequency (unlock), the “PLD” logic is low.5-4. Local Switch (D600, D601)The connection destination of the signal output from thebuffer amplifier (Q600) is changed with the diode switch(D601) that is controlled by the transmission power supply,50T, and the diode switch (D600) that is controlled by thereceive power supply, 50R. If the 50T logic is high, it is con-nected to a send-side pre-drive (Q601). If the 50T logic islow, it is connected to a receive-side mixer (Q703).6. Control CircuitThe control circuit consists of the ASIC (IC108) and itsperipheral circuits. IC108 mainly performs the following;1) Switching between transmission and reception by PTTsignal input.2) Reading system, zone, frequency, and program data fromthe memory circuit.3) Sending frequency program data to the PLL.4) Controlling squelch on/off by the DC voltage from thesquelch circuit.5) Controlling the audio mute circuit by decode data input.6-1. ASICThe ASIC (IC108) is a 32-bit RISC processor, equippedwith peripheral function and ADC/DAC.This ASIC operates at 18.432MHz clock and 3.3V /1.5VDC. It controls the flash memory, SRAM, DSP, the receivecircuit, the transmitter circuit, the control circuit, and the dis-play circuit and transfers data to or from an external device.LoopFilterBUFFAMPRippleFilterVCO150CVCTCXOPLLICIC502 Q512Q508,Q509D506,D507,D510,D511D514~D517,D519BUFFAMPQ60050CLPFSDO1SCK1/PCS_RFX50019.2MHzT/RSWD600,D601to TX stage50T50Rto 1st MixerIC504(1/2)Q504Q503IC503CVVCO_MODASSISTFig. 7 PLL block diagramCIRCUIT DESCRIPTION