Lattice Semiconductor LatticeECP2M SERDES User Manual

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Lattice Semiconductor LatticeECP2M SERDES User Manual Manual pdf 4 page image

4LatticeECP2M SERDESLattice Semiconductor Evaluation Board User’s GuideFigure 3. LatticeECP2M SERDES Evaluation Board, Top ViewLatticeECP2M DeviceThis board features a LatticeECP2M FPGA with a 1.2V core supply. It can accommodate all pin compatibleLatticeECP2M devices in the 672-ball fpBGA (1mm pitch) package. A complete description of this device can befound in the LatticeECP2/M Family Data Sheet.Note: The connections referenced in this document refer to the LFE2M35E-FF672 device. Available I/Os and asso-ciated sysIO™ banks may differ for other densities within this device family. However, only the LFE2M50E-FF672device allows full use of the PCI Express x1 edge, SFP and SATA interfaces.Applying Power to the BoardThe LatticeECP2M SERDES Evaluation Board is ready to power on. The board can be supplied with power froman AC wall-type transformer power supply shipped with the board. Or it can be supplied from a bench-top supplyvia terminal screw connections. It also has provisions to be supplied from the PCI Express edge fingers from a hostboard.To supply power from the factory-supplied wall transformer, simply connect the output connection of the power cordto J1 and plug the wall transformer into an AC wall outlet.Power Supplies(see Appendix A, Figure 2)The evaluation board incorporates an alternate scheme to provide power to the board. The board is equipped toaccept a main supply via the TB1 connection. This connection is provided to use with a bench-top supply adjustedto provide a nominal 12V DC.All input power sources and on-board power supplies use surface mounted fuses and have green LEDs to indicatepower GOOD status of the intermediate supplies