Lattice Semiconductor LatticeECP3 User Manual
Also see for LatticeECP3 Versa: User guideUser guideUser guide
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Contents | 
21LatticeECP3 PCI Express Solutions Board – Revision AUser’s GuideTable 16. CPLD TO FPGA InterconnectionsCPLD Pin FPGA PinM1 B2P13 B3P10 D4N7 E4N8 C3P11 D3N13 G5N1 G6N3 E3N4 F4P1 H6M12 J6M2 C2M3 D2M4 K8M6 J7Ordering InformationDescription Ordering Part NumberChina RoHS Environment-FriendlyUse Period (EFUP)LatticeECP3 PCI Express Development Kit(Includes LatticeECP3 PCI Express SolutionsBoard)LFE3-95EA-PCIE-DKNTechnical Support AssistanceHotline: 1-800-LATTICE (North America)+1-503-268-8001 (Outside North America)e-mail: techsupport@latticesemi.comInternet: www.latticesemi.comRevision HistoryDate Version Change SummaryMarch 2010 01.0 Initial release.December 2010 01.1 LED definitions table, L0 state changed from active to inactive.Download Procedures section, changed ispVM requirement from ispVMv.17.4 (or later) to ispVM v.17.7 (or later).August 2012 01.2 Updated document with new corporate logo.Replaced Programming schematic.© 2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are aslisted at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks oftheir respective holders. The specifications and information herein are subject to change without notice. |
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