Lattice Semiconductor iCE40HX-8K User Manual

Also see for iCE40HX-8K: User guide User guide

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Lattice Semiconductor iCE40HX-8K User Manual Manual pdf 4 page image

4iCE40HX-8K Breakout BoardiCE40 DeviceThis board features an iCE40HX-8K device with a 1.2v core supply. It is packaged in a 256 caBGA package. For acomplete description of this device, see HB1011, iCE40 LP/LX/LM Family Handbook.Software RequirementsYou should install the following software before you begin developing designs for the evaluation board:• Lattice iCEcube2 Release: 2012.09SP1.22498 or later• Diamond Programmer: Version 2.2 or laterThese software are available at the Lattice website Design Software & IP page. Make sure you log in to the Latticewebsite, otherwise these software downloads will not be visible.Demonstration DesignThe demonstration design iCE40HX8KLED.zip file contains the following files:• LED_VHDL.vhd (VHDL code)• LED_Verilog.v (Verilog code)• LED.pcf (pin constraint file)• LED_VHDL_bitmap.hex (Bit stream file for programming FPGA.)• LED_Verilog_bitmap.hex (Bit stream file for programming FPGA.)Two source codes are provided, one written in VHDL and the other in Verilog. Both of these codes function identi-cally. This provides you with an option to use either one of the code when programming the Breakout Board. Whenthe FPGA is programmed with one of these codes, the red LEDs (D2 thru D9) will flash on for ½ second and off for½ second.Figure 3 shows the block diagram of the Verilog or VHDL code.Figure 3. Block Diagram of the Verilog or VHDL CodeThe source code has two counters that are used to divide the 12MHz clock by 216 and 96 generating a approxi-mately ½ second pulse. This pulse along with the decoder will turn the LEDs (D2 thru D9) on for ½ second and offfor ½ second. The decoder can be modified to have any type of LED sequence by changing either the VHDL orVerilog code.When the board is plugged into a USB port, a +5 volt power is applied to the board that will light a green LED(D11). After the FPGA has been programmed, a green LED (D10) will light. This LED is connected to the CDONEline of the FPGA.÷216 ÷ 96 2 bit counter Decoder½ second pulse 2LED 2LED 2LED 3LED 912MHz Clk