Chapter 4 Signal ConnectionsNational Instruments Corporation4-39AT-MIO/AI E Series User ManualThe CONVERT* pulses are masked off until the board generates theSTARTSCAN signal. If you are using internally generatedconversions, the first CONVERT* will appear when the onboardsample interval counter reaches zero. If you select an externalCONVERT*, the first external pulse after STARTSCAN will generatea conversion. The STARTSCAN pulses should be separated by at leastone scan period.A counter on your AT E Series board internally generates theSTARTSCAN signal unless you select some external source. Thiscounter is started by the TRIG1 signal and is stopped either by softwareor by the sample counter.Scans generated by either an internal or external STARTSCAN signalare inhibited unless they occur within a data acquisition sequence.Scans occurring within a data acquisition sequence may be gated byeither the hardware (AIGATE) signal or software command registergate.CONVERT* SignalAny PFI pin can externally input the CONVERT* signal, which isavailable as an output on the PFI2/CONVERT* pin.Refer to Figures 4-13 and 4-14 for the relationship of CONVERT* tothe data acquisition sequence.As an input, the CONVERT* signal is configured in the edge-detectionmode. You can select any PFI pin as the source for CONVERT* andconfigure the polarity selection for either rising or falling edge. Theselected edge of the CONVERT* signal initiates an A/D conversion.As an output, the CONVERT* signal reflects the actual convert pulsethat is connected to the ADC. This is true even if the conversions arebeing externally generated by another PFI. The output is an active lowpulse with a pulse width of 50 to 100 ns. This output is set to tri-stateat startup.
