Chapter 8 AutoCode Sim Cdelay Scheduler© National Instruments Corporation 8-9 AutoCode ReferenceSim Cdelay SchedulerAs stated at the outset, the goal of this project was to develop a newAutoCode scheduler, runnable on real-time targets, which mimics thebehavior of Sim with Cdelay (actiming off). Sim with Cdelay differsfrom Sim with actiming in several key ways, including schedulerpipeline, task output posting policies, enable policies, and retriggeringbehavior for triggered tasks.Notice that, unlike the stock AutoCode scheduler, Sim with Cdelay’sscheduler posts outputs twice per invocation. Outputs of tasks that are ATRare posted exclusively during the first output posting stage, while tasks thatare ANC have their outputs posted during the second output stage. Betweenthe two output postings stages is the queue tasks phase, which queues upthose tasks that are ready to start executing that cycle. Because all the ATRtasks post their outputs before this stage, it is clear that under this newpipeline configuration, any task enabled or triggered by an ATR task willbe queued for execution during the same cycle its input goes high.In addition to the altered scheduler pipeline, Sim with Cdelay also entailsnew output posting options for certain tasks. In fact, the output postingpolicy of all periodic blocks (both free-running and enabled) goes fromANC (Sim with actiming) to ATR (Sim with Cdelay). For free-runningtasks, ANC versus ATR does not really make a difference—it is just aparadigm shift. However, for enabled periodic tasks, the shift from ANC toATR leads to a very tangible reduction in output posting latency.One of the remaining changes brought by Sim with Cdelay is the movefrom a sync immediate on enable policy (default AutoCode scheduler), inwhich the enabled task is queued for execution on the first minor cycle itsenable input is seen to go high, to a global timeline enable policy. Unlikethe previous two modifications, this switch has a deleterious effect onoutput latency. The enable policy only matters in a given model if thescheduler minor cycle differs from the major cycle of one of the tasks; thus,it has no effect on the model presented at the beginning of this chapter.The other change entailed by Sim with Cdelay affects how retriggering ishandled for ATR triggered tasks if the computation has concluded but thetask has not yet posted its outputs. The default scheduler queues the trigger(at most one), releasing it (and allowing the system to be triggered again)only when its outputs are finally posted. Conversely, with Sim with Cdelay,the trigger is immediately acted on, even though the outputs have not beenposted. Notice that this has the unfortunate consequence that a sequence of
