National Instruments E Series User Manual

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National Instruments E Series User Manual Manual pdf 79 page image

Chapter 4 Signal ConnectionsNational Instruments Corporation4-43DAQCard E Series User ManualDAQCard. Figure 4-30 shows the GATE signal referenced to the risingedge of a source signal. The gate must be valid (either high or low) forat least 10 ns before the rising or falling edge of a source signal for thegate to take effect at that source edge, as shown by t gsu and t gh inFigure 4-30. The gate signal is not required to be held after the activeedge of the source signal.If an internal timebase clock is used, the gate signal cannot besynchronized with the clock. In this case, gates applied close to asource edge take effect either on that source edge or on the next one.This arrangement results in an uncertainty of one source clock periodwith respect to unsynchronized gating sources.The OUT output timing parameters are referenced to the signal at theSOURCE input or to one of the internally generated clock signals onthe DAQCards. Figure 4-30 shows the OUT signal referenced to therising edge of a source signal. Any OUT signal state changes occurwithin 80 ns after the rising or falling edge of the source signal.FREQ_OUT SignalThis signal is available only as an output on the FREQ_OUT pin. TheFREQ_OUT signal is the output of the DAQCard frequency generator.The frequency generator is a 4-bit counter that can divide its inputclock by the numbers 1 through 16. The input clock of the frequencygenerator is software selectable from the internal 10 MHz and 100 kHztimebases. The output polarity is software selectable. This signal is setto input (High-Z) at startup.