NI 5421 Specifications 18 ni.comPhase-Locked Loop (PLL) Reference ClockTable 4.Specification Value CommentsSources 1. NI PXI-5421—PXI_CLK10 (backplane connector)NI PCI-5421—RTSI_7 (RTSI_CLK)2. CLK IN (SMB front panel connector)The PLLReference Clockprovides thereferencefrequency for thephase-lockedloop.FrequencyAccuracyWhen using the PLL, the Frequency Accuracy of theNI 5421 is solely dependent on the Frequency Accuracyof the PLL Reference Clock Source.—Lock Time Typical: 70 ms.Maximum: 200 ms.—FrequencyRange5 MHz to 20 MHz in increments of 1 MHz.Default of 10 MHz.The PLL Reference Clock Frequency has to be accurateto ±50 ppm.—Duty CycleRange40% to 60% —Exported PLLReferenceClockDestinations1. PFI<0..1> (SMB front panel connectors)2. NI PXI-5421—PXI_Trig<0..7> (backplane connector)NI PCI-5421—RTSI<0..7>—