Chapter 9 Digital Routing and Clock Generation© National Instruments Corporation 9-9 M Series User ManualNote that in a PXI chassis with more than eight slots, the PXI trigger linesmay be divided into multiple independent buses. Refer to thedocumentation for your chassis for details.PXI_STAR TriggerIn a PXI system, the Star Trigger bus implements a dedicated trigger linebetween the first peripheral slot (adjacent to the system slot) and the otherperipheral slots. The Star Trigger can be used to synchronize multipledevices or to share a common trigger signal among devices.A Star Trigger controller can be installed in this first peripheral slot toprovide trigger signals to other peripheral modules. Systems that do notrequire this functionality can install any standard peripheral module in thisfirst peripheral slot.An M Series device receives the Star Trigger signal (PXI_STAR) from aStar Trigger controller. PXI_STAR can be used as an external source formany AI, AO, and counter signals.An M Series device is not a Star Trigger controller. An M Series devicemay be used in the first peripheral slot of a PXI system, but the system willnot be able to use the Star Trigger feature.PXI_STAR FiltersYou can enable a programmable debouncing filter on each PFI, RTSI, orPXI_STAR signal. When the filters are enabled, your device samples theinput on each rising edge of a filter clock. M Series devices use an onboardoscillator to generate the filter clock with a 40 MHz frequency.Note NI-DAQmx only supports filters on counter inputs.The following is an example of low to high transitions of the input signal.High to low transitions work similarly.Assume that an input terminal has been low for a long time. The inputterminal then changes from low to high, but glitches several times. Whenthe filter clock has sampled the signal high on N consecutive edges, the lowto high transition is propagated to the rest of the circuit. The value of Ndepends on the filter setting; refer to Table 9-3.
