National Instruments Signal Processing Engineering Educational Device NI SPEEDY-33 User Manual
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Contents
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Chapter 2 NI SPEEDY-33 Functional Description and InterfaceNI SPEEDY-33 User Manual 2-4 ni.comMemory MapThe DSP runs in microcomputer/bootloader mode on the NI SPEEDY-33.The memory map for the NI SPEEDY-33 is shown in Figure 2-3.Figure 2-3. NI SPEEDY-33 Memory MapReserved for Bootloader Operations0hFFFhExternal RAM (1008 KB) 5 Wait States1000h3FFFFh(Empty)40000h3FFFFFhFlash Memory (2048 KB in Space,Byte-Wide, Lowest Byte) 7 Wait States400000h47FFFFh(Empty)480000h7FFFFFhInternal RAM Block 2 (64 KB)800000h803FFFhInternal RAM Block 3 (64 KB)804000h807FFFhPeripheral Bus Memory-Mapped Registers(24 KB Internal)808000h8097FFhInternal RAM Block 0 (4 KB)809800h809BFFhInternal RAM Block 1 (4 KB)809C00h809FC0hUser Program Interrupt and Trap Branch Table809FC1h809FFFh(Empty)Board Status/CTL, XXFUSB Peripheral StatusUSB Host EVENUSB Host ODDSwitch Read/LED Write80B000h80B003h80B004h80B005h80B007hCompactFlash Control/DataC00000hC0000FhUSB Boot AreaFFF000hFFFFFFh |
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