1.0 Introduction opposite to their default positions. To use thetransformer T1, place jumpers JP1, JP2 and JP3 totheir default positions. When using the transformer,the signal level at BNC J1 should be about 2Vp-p.The ADC14071EVAL Design Kit (consisting of theADC14071 Evaluation Board, National's WaveVisionsoftware and this manual) is designed to ease evaluationand design-in of National's ADC14071 14-bit, 7MSPSAnalog-to-Digital Converter. 11. Adjust the signal level so that LEDs D34 and D4 arenot on.12. With the WaveVision software, select the parallel port(under the Options menu) that is to be used.With the WaveVision software operating under MicrosoftWindows 3.1 or later, the signal at the Analog Input isdigitized and can be captured and displayed on thecomputer monitor as a dynamic waveform. The digitizedoutput is also available at a pair of headers, HDR1 andHDR2, for easy connection with ribbon cables.13. Capture data by pressing CTRL -X.14. Perform an FFT on the data that was acquired bypressing CTRL -F.Note that earlier versions of the ADC16061 software may beused with the ADC14071 evaluation board. However, thefollowing exceptions/changes should be noted. The defaultoscillator divider (Board to ADC Clock Ratio) shown whenCTRL +P is pressed is "8", which really causes a divide by 4for tha ADC14071 board. So with a 14.31818MHz crystal inplace, the ADC clock frequency would be 3.579545MHz.The divide by ratio should be changed to "4", which will yielda divider of 2 and an ADC clock frequency of 7.15909MHz.When performing an FFT on the captured waveform, it willbe necessary to change the indicated Sampling Rate for thedata if the horizontal axis of the display is changed tofrequency. You can make this change by double clicking theleft mouse button with the cursor over the FFT display.The software can perform an FFT on the captured dataupon command and display a spectral plot. This spectralplot also shows dynamic performance in the form of SNR,SINAD, THD and SFDR.Both a socketed transformer and an op-amp-based single-ended to differential conversion circuit are available withjumpers to select which is used. A prototype area isavailable for building customized input conditioning circuitry.The on-board clock oscillator is stated as being 14MHz inthis manual, but the popular 14.31818MHz crystal is quiteacceptable and provided with the assembled board.Because this board uses software that is also used for the2.5 MSPS ADC16061, you will see references in this manualto the ADC16061.EXE software. For the ADC14071, be sureto use Version 2.1 or later of the ADC16061.EXE softwarewith the ADC14071 choice in the Configuration Menu.3.0 Functional DescriptionFigure 7 shows the block diagram of the ADC14071evaluation board, whileFigures 8 and9 show the boardschematic. U4 is the ADC14071 under test.2.0 Quick Start3.1 Input signal conditioning.1. Unless the ADC14071 Evaluation Board has been pre-assembled, it needs to be assembled beforeoperation. Refer toFigure 1 for the location of majorcomponents on the board. Refer to section 8.0 for thebill of materials.The board contains a breadboard area to be used asneeded. The input signal to be digitized should be applied toBNC connector J1. For sinusoidal input signals you shouldinclude an appropriate bandpass filter in the input circuitrybecause the signal from any generator will usually containmore distortion than that produced by a 14-bit ADC. Withoutthe input filter, the measured performance will not be asgood as the ADC14071 capability.2. Connect a cable with DB-25 connectors betweenconnector P1 on the board and an available parallelport on your PC.3. Position jumpers JP4 and JP5 to their default positionas indicated inFigure 1. Position jumpers JP1, JP2and JP3 opposite to their default positions.Note that the input signal to the ADC14071 should not swingbelow ground, or go above the ADC14071 analog supply,VA, to avoid damage to the device. To avoid signal clippingat the ADC output, the signal at the ADC input pins shouldhave a peak-to-peak value less than VREF, centered aroundVREF/2.4. Connect voltage sources (±12V to ±15V) and groundto Power Connector P2 and turn on the power.5. Press the RESET button (S1).6. Adjust VR2 for 2.0V at TP1. This sets the ADC14071reference voltage. To get the correct differential 4VP-P centered at VREF/2 atthe ADC14071 input, the transformer requires a 2 VP-Psignal at J1, while the op-amp circuit requires a 1 VP-Psignal centered at 0V to be applied at J1.7. Adjust VR1 (Balance) for equal dc voltages at TP12and TP13 (near JP2 and JP3).3.2 ADC reference circuitry.8. Copy Version 1.1 or later of the WaveVision software(ADC16061.EXE) to the desired computer hard drivedirectory and RUN it. The ADC14071 operates with a nominal reference voltage of2.0V. The acceptable reference voltage range is9. Connect a 50 Ohm signal generator to BNC J1 andadjust its output for a signal excursion between thelimits of -0.5V and +0.5V. Be careful not to overdrivethe ADC14071 input.1.0V ≤ VREF ≤ 2.7V.This board, if assembled, comes with a LM4041-ADJadjustable reference. The nominal range of adjustment inthis circuit is 1.3V to 2.8V.10. To use the op-amp-based single ended to differentialconversion circuit, place jumpers JP1, JP2 and JP35 http://www.national.com