UPP_WD2 voltage/clock frequency adjustingNo external clock is available for UPP_WD2 before VCXO starts. As reset is released, the VCXO is running and MCUuses the 26 MHz clock while DSP is in reset. There are three identical DPLL's, for MCU, for DSP and for accessoryinterfaces, which can be controlled independently. The clock for MCU can be up to 130 MHz and 156 MHz ismaximum clock frequency for the DSP. These clock signals are used either directly (SDRAM IF) or divided downfor the interfaces (e.g. flash IF).Power distribution, control and resetAll power (except backup battery power) is drawn from the BL-4C Li-Ion battery located in the B cover. Currentflows through ZOCUS current sense resister which is used for current measurement by ZOCUS and thus forremaining operating time estimation.1FSA board contains one power ASIC, UEME and discrete regulators needed for generating the differentoperating voltages. The discrete regulators consist of an SMPS to power UPP_WD2 voltage core. In addition,there is a SMPS in 1FSA generating the operating voltage for display module backlighting. In 1FSA, the keyboardbacklight is powered with a charge pump regulator.There is also a “soft watchdog” in UPP_WD2. It is used to reset the chip in case software gets stuck for any reason.Power-up sequence (reset mode)RESET mode can be entered in four ways: by inserting the battery or charger, by RTC alarm or by pressing thepower key. The VCXO is powered by UEME. After a 220 ms delay, regulators are configured and UEME entersPWR_ON mode and system reset PURX is released.During the system start-up, in RESET state, the regulators are enabled, and each regulator charges the capacitor(s) at the output with the maximum current (short circuit current) it can deliver. This results in battery voltagedropping during start-up. When a battery with a voltage level just above the hardware cutoff limit is inserted,the system may not start due to excessive voltage dipping. Dropping below 2.8 V for longer than 5 us forcesthe system to PWR_OFF state.Powering offControlled powering off is done when the user requests it by pressing the power-key or when the battery voltagefalls too low. Uncontrolled powering off happens when the battery is suddenly removed or if over-temperaturecondition is detected in regulator block while in RESET mode. Then all UEME’s regulators are disabledimmediately and discrete regulators are disabled as Vbat supply disappears.Controlled powering offFor RM-25, powering off is initiated by pressing the power key and power off sequence is activated in UEME andSW. Basically, the power key causes UEME interrupt to UPP_WD2 and SW sets watchdog time value to zero andas this happens, PURX is forced low and all regulators are disabled.If the battery voltage falls below the very last SW-cutoff level, SW will power off the system by letting the UEME’swatchdog elapse.If thermal shutdown limit in the UEME regulator block is exceeded, the system is powered off. System resetPURX is forced low.Uncontrolled powering offThis happens when the battery is suddenly removed. UEME’s state machine notices battery removal after thebattery voltage has been below VCOFF- for 5 us and enters PWR_OFF mode. PURX is set low and all UEME’sregulators are disabled.RM-25System module Nokia Customer Care9235618 (Issue 2) Company Confidential Page 9–9Copyright ©2005 Nokia. All Rights Reserved.