42113901TH01 Rev.3 127 /Oki Data CONFIDENTIALOCSP1P2P0P3TDRDIF WRLS245 ROM64KbitRDTDRAM64KbitDriver+5 VD+12VDC-8VDC+5 V+9 V–9 V+5V0V±9 V powersupply circuitSerial datacontrol lineBus lineControl lineADR latchReceiverDB0 to DB9ADR/data busADR bus80C51RSTCN17518875189Figure C-1 Block Diagram2.2 Circuit DescriptionA block diagram is shown in Figure C-1.2.2.1 Operation at power onAfter power is turned on, an RST OUT signal is sent from the printer control board to reset theprinter. When the reset is canceled, the 80C51 CPU performs initialization. Initialization consistsof setting the 80C51 timer, and setting the serial mode.2.2.2. RS-232C interfaceThe DTR, SSD, TD and RTS signals output by the 80C51 are converted to RS-232C signalsby line driver 75188 (Q1) and sent to the interface.In addition, signals DSR, CTS, CD, and RD on the RS232C interface are converted to TTL levelby line receiver 75189 (Q2) and input to the 80C51.