13.34. D-Board Block DiagramTXD_PCRXD_PCSDA2SCL2SDA1IIC_CONTSCL1PANPS_PS_SOSPANEL_MAIN_ONREADYALARMFAN_CONTFAN_SOSECO_ONF_STBY_ONFAN_CONTFAN_SOSECO_ONF_STBY_ONCLKM_INFREE_RUNIIC_INTDRVMUTENCEDCLKNCSDATA0CONF_DONEDCLKNCEASDI0NCONFIGCONF_DONENCONFIGDATA0NCSASDI0X9200R 10bitIIC/INTG 10bitB 10bitIIC_CONTSCL2SDA1SDA2SCL1711612D410LVDS DISCHARGECONTROLVoltageIC9500FPGA/SYNC/OSD/DISCHARGE CONTROL5LowTO DG3 D31AVRAVR STB3.3V2DRVMUTESTB5V_MSTB3.3V4IC9008IIC_DATA1IIC_CLK1 19TUNER_SUB_ON6ALARMFAN_SOS8FAN_CONT(FAN_MAX)73DISPEN4READYPANEL_STB_ON1141120ECO_ON42RXDTXD6D50+LVDSCLKE+LVDSCLKE-LVDS214TO DG518E-LVDS3E+LVDS0167151112E-LVDS1104E-LVDS410-LVDSCLK9E-LVDS0 2E-LVDSCLKE+LVDS2E+LVDS117E+LVDS45E+LVDS3LVDS_DETSTBY5V+5VD25PS_SOS9PANEL_MAIN_ONECO_ON1+5V 7FAN_SOS213+12V15+12VFAN_CONT141716310TO P25F_STBY_ONnCS15178nCE 6DATA0 7CONF_DONEPDB01nCONFIGPSTB5ASDIO311PSLCTPBUSY9D6DCLK1319XRSTPDB11816DCDC_ONst-rIC9300CONVERTERCTI/TINTWB-ADJI/P COLORFORMAT CONVERTER/RGB PROCESSORCONVERTER CONTRASTFORMATDifferentialSignalingRECEIVERFPGA CONTROLOSDR,G,B,HD,VD,CKQ9003Q9012Q9013Q9008Q9009P3V_SCL2P3V_SDA2R0 B0 VD HD DCKG9R9 B9PICTURE OUTPUTDCKG0P3V_SCL1P3V_SDA1Q9000P12VP5VSTB5V_MIC900165EEPROMSDASCLQ9704Q9703151RUN/SS126SW123BG227TG224VIN17BG219SW216TG2RUN/SS2G2 S2 G1 S1D2 D13.3VQ9702 Q9701P12V1.5VDC_DC CONV.IC9702D2G1S2 S1G2D1NRSTDRV_RSTDATA POWERFEEDBACKDATA DRIVERSS PULSESCAN OUTSC PULSEVD HDCLK410CLK8CLK111714 CLK5X1 120X2PCK OCKDPCLK5 DPCLK2DON/OFFSWQ9004 Q9001P3V_SCL1P3V_SDA1FPDATA0FPDATA1FPCLKSCL SDAP3V_SCL2P3V_SDA2CONTROL3.3V3.3V 1443.3V1DATA 62 IC90075NCSDCLKADSICONF_DONEDATA0NCSNCEASDI0NCONFIGDCLKSTB 5VSTB 5V 12PROM(FPGA)CDIGITAL SIGNAL PROCESSORPLASMA AIFORMAT CONVERTER,SUB-FIELD PROCESSORFORFACTORYUSEFORFACTORYUSETH-42PM50UD-Board Block Diagram90