Schematic DiagramService Manual11-4This Document can not be used without Samsung’s authorization. Samsung ElectronicsMain Board(4/15)S0 S11LOWCLX-3160FN ONLYN.C[ VCLK ][ SYSTEM CLOCK ]C[ RTC ]Digtal Printing DivisionBBTITLE:Main_V0.11430%7CDrawn byN.CDOC CTRL CHKClock & Power On ResetAB0.4%5DEN.C1.3%7 8Engineer K.C.LEEAB6F862 32CLP-300(N)/CLX-3160N(FN)DE1F1MFG ENGR CHKSize4 5BBR&D CHK S.D.ANR&D 51 00.5%N.C 01.1%0 0[ SYSTEM RESET ]2.2uHL94/15A3R1900DGND+5V +1.2V+5V16V100uFC255R151470KATS-49/U,12MHz,50ppmOSC5R1701K+3.3V+3.3VKSC1623-YQ111 32100nFC234VbDGND16V10uFC303MC-306,32.768KHz22pFOSC3+5VC155R172100NR114DGND+3.3V04 SGNDSHDN108 SVINSW 611VSETU19MVPG311NC1NC2 2NC3 39 NC413 PGNDPSET 12PVIN75SFB5621 3R161R105 31.6K,1%STS104BF11nFQ12KSA1182-Y132C302R162 56R142 300DGNDSLS-NNGA102TSLED1C128 15pFDGND DGND+3.3VATS-49/U,12MHz,50ppmOSC2DGNDDGNDL85.1KC17815pF21 3R175C194F3STS104B100nF+3.3VC129 15pFR11510 100nFC301R109 280K,1%DGNDDGND15pF21 3C210GND1IN3 2OUTF2STS104B LD1117DT33CU240R121D27RB420D T1473301-000325|R3225_BEADL5XC61FN3112MRU253 Vin1Vout2VssDGNDC24322uF+3.3VR152 5.6K21 XIN/CLKIN 8XOUTU12CY258116FRSELS043 S15SSCLK7VDDVSSC308C24410uF16V47uFC211DGNDNR615pF1DGND30K KSB1151-YQ93222pFC165FGNDC277100nF+3.3VR88 33R1890 C31222pFDGNDnRESETVBINXI_MCLKXI_RTCXO_RTCTEST_LED3XI_VCLKXO_VCLK
