SAMSUNG Proprietary-Contents may change without notice12. Schematic Diagram12-1This Document can not be used without Samsung's authorization- NC Point-Main ChipReleased to Samsung under NDA6. Pinning in format io nFig 2. PNX4900 ball config urati on dia gram12345678 9 10 11 12 13 14 15 16 17 18 19A RFOH RFOL GND_RF VDD_RF XTAL_SHLDXTAL_26M_2XTAL_26M_1XTAL_SHLDGND_VCORE ADDR16 NCS2 NCS0 VDD_VMEM1VDD_VMEMVDD_VMEM ADDR14 DATA6 DATA7 DATA14B NO_CONNECT GND_RF GND_RF VDD_RF XTAL_SHLDXTAL_SHLDXTAL_SHLDXTAL_SHLDGND_VCORE ADDR8 NWE0 NCS1 ADDR15 ADDR22 VDD_VMEM ADDR21 DATA12 DATA13 DATA5C NO_CONNECT GND_RF DATA15 DATA4D RFID_P GND_RF GND_RF GND_RF GND_RF GND_RF GND_VCORE ADDR10 ADDR7 NBE0 NRESET_OUT ADDR12 ADDR13 VDD_VMEM ADDR17 DATA11 DATA3E RFID_N GND_RF GND_RF GND_RF GND_RF GND_RF GND_VCORE ADDR9 ADDR6 ADDR5 NBE1 NOE ADDR2 ADDR19 ADDR3 DATA10 DATA2F RFIE_P GND_RF VDD_RF GND_RF ADDR18 ADDR4 DATA9 DATA1G RFIE_N GND_RF GPIO8 VDD_RF_IOGND_VCOREGND_VCOREGND_VCOREGND_VCORE ADDR11 ADDR1 GND_VSIM ADDR20 SIM_RST DATA0 DATA8H GND_RF GND_RF GPIO38 GPIO10 GND_VCOREGND_VCOREGND_VCOREGND_VCOREGND_VCOREGND_VCOREVDD_VSIMGND_GDGPANO_CONNECTSIM_DATA SIM_CLKJ GPIO39 GPIO52 GPIO57 VDD_VIO2 GND_VCOREGND_VCOREGND_VCOREGND_VCOREGND_VCOREGND_VCOREGND_VCOREFE_CTRL0FE_CTRL1NO_CONNECTNO_CONNECTK KEYIN0 KEYIN1 KEYIN2 VDD_VIO VDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREFE_CTRL2VDD_RFDIGUART0_TDXTAL_32K_2L KEYIO0 KEYIO1 KEYIO2 GND_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREFE_CTRL3CLK_32K_OUTUART0_RDXTAL_32K_1M KEYOUT0 KEYOUT1 NTRST GND_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREVDD_VCOREGND_GDGPA PA_RAMP VBAT_RTCAUX_ADC0N KEYOUT2 KEYOUT3 TDI VDD_VIO GND_VCOREGND_VCOREGND_VCOREGND_VCOREGND_VCOREGND_VCOREGND_VCOREVDD_GPPMNO_CONNECTNO_CONNECTHKSW_DET2P TDO TCK RTCK VDD_VIO GND_VBG VBG AUXAUD_IN_LHKSW_DET1R SSI_SEL0 TMS TEST VDD_VIO GND_GDGPANO_CONNECT AUX_POK VBAT_SENSEGATE_REGGND_VCOREVBAT_ANAVBAT_ANAVDD_AUDIO_DRVVDD_AUDIO_DRVVDD_AUDIOAUXAUD_IN_REXTMIC_IN_NT SSI_CLK SSI_SEL2 NRESET PWM_OUT1PWM_OUT2PWM_OUT0 POK_IN VDD_GPPMGND_VBAT_SNSVBAT_DCDCVBAT_DCDCGND_AUD_DRVGND_AUD_DRVGND_AUD_DRV GND_SUB INTMIC_BIASEXTMIC_IN_PU SSI_DATA SSI_OUT EXTMIC_BIASINTMIC_IN_NV GPIO41 GPIO2 GPIO6 GPIO7 UART1_TDTHERM_INUART1_CTS POK_OUT ACC_DET_IN VCHG SWCORE VCORE VDD_VPERMPMU_VSIMPMU_VMEM VCM_OUT VCM_OUT GND_AUD INTMIC_IN_PW GPIO40 GPIO5 GPIO20 GPIO1 UART1_RDUART1_RTS LDO_EN ICHGN ICHGP GATE_SW SWCORE PMU_VPERM PMU_VRF PMU_VANA PMU_VIO EAR_OUT_N/REAR_OUT_P/LHSET_OUT_NHSET_OUT_P