Samsung SF-335T Repair Manual

Also see for SF-330 Series: Quick install guide Operating instructions User manual Service guide

Contents

CIRCUIT DESCRIPTION2. HEAD DATA OUTPUT FORMATThe 1 slice data [47:0] from the HDMA is outputted with the PHADR in order as below.<9> SYNCHRONOUS SERIAL INTERFACE PARTIt interfaces with Quarter-horse ASIC and consists of SMIC, SMID, PWM, and _RST. The Quarter-horse is theMotor Driver IC. The Quarter-horse interface Logic makes the data as a serial for transmitting the data to theQuarter-horse, and transmits the serial to the Quarter-horse IC by controlling it with the arranged Protocol. TheQuarter-horse uses two signals, SMIC (clock) and SMID (data) to transmit the data. It transmits 3 bytes at once,and the 3 bytes mean the Device Address, Data 1, and Data 2. It is transmitted from MSB to LSB. The Quarter-horse sends the ACK signal at the end of the each byte to confirm the transmitted data. In case of no receivingACK signal, the Quarter-horse_interface Logic sends the 3 bytes again. Depending on the level of the SMIC andSMID signals, the different messages are shown.If it is high (SMIC) and high (SMID), it means the IDLE condition which means no data is received, if it is high(SMIC) and high-to-low-transition (SMID), it means the data transfer is started, and if it is high (SMIC) and low-to-high-transition (SMID), it means the last data transfer.