Samsung SF3000 Service Manual

Also see for SF3000: Operator's guide

Contents

5-14 Samsung ElectronicsCircuit Description5-5-7. SDIP4 ASIC Pin DescriptionName Type DescriptionRESET I Power on reset pin. active : LA[5:0] I CPU interface address bus.D[15:0} B CPU interface data bus.WR I CPU interface write signal pin.RD I CPU interface read signal pin.IPCS I CPU interface chip select signal pin.XP I System clock input pin.AIN I Sensor image signal input pin.Ør O CCD charge clear signal pin.SI O CCD/CIS line clear signal pin.CLK1 O Sensor Drive signal output pin.CLK2 ODREQ O DMA data request signal output pin. active : HDACK I DMA data acknowiedge output pin. active : LRAM_RD O IP-SRAM read signal pin.RAM_WR O IP-SRAM write signal pin.RAM_addr[14:0] O IP-SRAM address bus.RAM_data[7:0] O IP-SRAM data bus.Tx_A OTx_B OTx_A O Motor drive signal pins.Tx_B OTx_en1 OTx_en2 OTx_int O Motor drive interrupt pin.GPI[7:0] I General purpose input pins.GPO[7:0] O General purpose output pins.GPIO[7:0] B General purpose input/output pins.