Samsung STH-N275 Service Manual

Also see for STH-N275: User guide

Contents

SAMSUNG Proprietary-Contents may change without notice6-16. Circuit Description & Circuit DiagramsSTH-N275 provides the AMPS and the Digital TDMA (cellular band only) of compliance with TIA/EIA-137.The radio operation of the STH-N275 has been implemented with the receiver, the transmitter, and the localoscillator controlled by the PLL. The circuit of the STH-N275 is described as followings.1. Baseband Section1-1. Power SupplyFor the POWER ON, with the battery installed on the telephone and by pressing the END key, the BATTand ON_SW signals will be connected, which it will turn on Q107. In addition, Q106 is turned on by Q107,and thus the BATT is connected to VBAT. Consequently, VBAT is supplied to input of regulators U110 andU111. The regulator U110 supplies all powers of baseband part (VCC, AVCC, V_VCTCXO). The regulatorU111 supplies IVCC (2.2 V) to Baseband Engine Chip (U203: BEC). The BEC (U203), which is suppliedpower from VCC, IVCC and reference clock 14.4 MHz from TCXO (OSC302), will start to run. If BEC willstart to run normally, the BEC output POWER_HOLD signal (low active) which is connected to Q105.Moreover, Q105, Q107 and Q106 are turned on in order. In consequence, BATT is connected to VBATcontinuously. Although END key is released (ON_SW disconnected BATT). The power from U110 andU111 is used in all baseband part of BEC, IFC (Interface Chip U101).For the POWER OFF, in this case main application program is running already. The main applicationprogram is checking all GPIO inputs periodically. When press the END key during program is running, theBATT and ON_SW signals will be connected. This turns on Q107. Therefore, ON_SW_SENSE that isconnected to GPIO_0_5 (U203_ C13) turned logic high to low. The BEC checks this signal, main applicationprogram enter to POWER OFF mode.1-2. BEC (U203) interfaceThe BEC (U203) is mainly consist of two parts HOST CPU and Baseband Engine (Figure2-1). This is animportant component of dual-mode (US-TDMA and AMPS mode) cellular phone. It has 1Kx 32 of internalROM and 2Kx32 of internal RAM. This is communicate with a lot of peripheral device, memory (FlashROM, SRAM), Key Pad and LCD. The BEC receives TCXO clock signals from the TCXO and controls thephone during the operation. The BEC communicates with the IFC through several serial links. Theseinclude CODEC, wideband data, receiver data, transmitter data, and auxiliary data interface Signals. Amaster baseband clock (BBCLK: U203_H2) at either 6.2208 MHz or 5.12 MHz or 4.096 MHz, depending onthe operating mode, from the BEC drives the IFC. The major components are as follows:Separate address and data buses provide a data path to external memory and memory mappedperipherals. The 22-bit address bus provides a byte addressing range up to 8 MB in each of 4 spacesdecoded by the 4 select signals. The 16-bit data bus in conjunction with the UBE signal allows word or bytetransfers. Table2-1 shows the ARM memory map. An Intel 28F3204 Stacked Memory chip supplies 4MBytes of Flash memory and 512 KBytes of SRAM. Note that in the phone, the SRAM is located at theCS_RES1 block of memory.