TB7100 Service Manual Circuit Descriptions 51© Tait Electronics Limited October 20054.4 Frequency Control LoopIntroduction The FCL is included in the block diagram of the frequency synthesizer(see Figure 4.4).The FCL forms part of the frequency-synthesizer module. The basis of theFCL is a VCXO, which generates the reference frequency required by themain PLL of the synthesizer.Elements ofFCL Circuitry The FCL is a simple frequency-locked loop. The circuitry consists of thefollowing elements:■ VCXO (XL501, Q501, Q503)■ TCXO (XL500)■ buffer amplifier (IC500)■ mixer (IC501)■ low-pass filter (IC502, pins 5 to 7)■ modulator buffer amplifier (IC502, pins 1 to 3)The TCXO supplies a reference frequency of 13.0000MHz, which isextremely stable, regardless of the temperature. The VCXO runs at anominal frequency of 13.0120MHz, and is frequency-locked to the TCXOreference frequency.Circuit Operation The VCXO output is mixed with the TCXO output to create a nominaldifference (or offset) frequency SYN CDC FCL of 12.0kHz. The signal SYN CDCFCL is fed via the CODEC IC502 in the CODEC circuitry to the FPGA onthe digital board. The FPGA detects the offset frequency, compares it withthe programmed offset frequency, and outputs a corresponding feedbacksignal CDC VCXO MOD via IC205. The feedback signal is amplified and invertedby the modulator buffer amplifier and output as the loop voltage for theVCXO. With this design the VCXO frequency can be adjusted by verysmall precise amounts, and because the loop is locked, the VCXO inheritsthe temperature stability of the TCXO.Modulation The FCL modulation is implemented within the FPGA and appears at theoutput of IC205, and therefore on the VCXO loop voltage. Consequently,the VCXO is frequency modulated directly by the relevant modulationinformation. The latter may be the microphone audio, an audio tap-insignal, internal modem signals, or any combination of these.