Xilinx Kintex-7 FPGA KC705 Getting Started Manual
Also see for Kintex-7 FPGA KC705: User guideGetting started guideGetting started
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30 www.xilinx.com KC705 Getting Started GuideUG883 (v4.0.1) May 28, 2014Advanced Bring-up Using the Base Targeted Reference Design2. To start data traffic on the two data paths:a. Click Start Test on Raw Data Path0 as shown in Figure 20. This enables thedriver to start generating the data for Raw Data Path0.b. Click Start Test on Raw Data Path1 as shown in Figure 20. This enables thedriver to start generating the data for Raw Data Path1.Table 4: KC705 Board Status Field ExplanationsField Status ExplanationLink Status Up This confirms that the PCIe link is up and a PCIe connection isestablished between the Kintex-7 FPGA Endpoint for PCI Expressand the PC motherboard chipset.Link Speed 5.0 Gb/s This confirms that the PCIe link is operating at line rate speed perPCI Express, v2.0.Link Width x4 This confirms that the PCIe link is trained as a x4 link.Send Feedback |
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